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04.04.2020 22:29, Sumit Gupta ÐÐÑÐÑ:
...
+static void tegra_read_counters(struct work_struct *work)
+{
+ struct read_counters_work *read_counters_work;
+ struct tegra_cpu_ctr *c;
+ u64 val;
+
+ /*
+ * ref_clk_counter(32 bit counter) runs on constant clk,
+ * pll_p(408MHz).
Is changing PLLP rate really impossible on T194? What makes you say that
it runs on a fixed 408MHz?