[PATCH v6 5/8] dt-bindings: display: add i.MX6 MIPI DSI host controller doc

From: Adrian Ratiu
Date: Tue Apr 14 2020 - 11:19:36 EST


This provides an example DT binding for the MIPI DSI host controller
present on the i.MX6 SoC based on Synopsis DesignWare v1.01 IP.

Cc: Rob Herring <robh@xxxxxxxxxx>
Cc: Neil Armstrong <narmstrong@xxxxxxxxxxxx>
Cc: Fabio Estevam <festevam@xxxxxxxxx>
Cc: devicetree@xxxxxxxxxxxxxxx
Tested-by: Adrian Pop <pop.adrian61@xxxxxxxxx>
Tested-by: Arnaud Ferraris <arnaud.ferraris@xxxxxxxxxxxxx>
Signed-off-by: Sjoerd Simons <sjoerd.simons@xxxxxxxxxxxxx>
Signed-off-by: Martyn Welch <martyn.welch@xxxxxxxxxxxxx>
Signed-off-by: Adrian Ratiu <adrian.ratiu@xxxxxxxxxxxxx>
---
Changes since v5:
- Fixed missing reg warning (Fabio)
- Updated dt-schema and fixed warnings (Rob)

Changes since v4:
- Fixed yaml binding to pass `make dt_binding_check dtbs_check`
and addressed received binding feedback (Rob)

Changes since v3:
- Added commit message (Neil)
- Converted to yaml format (Neil)
- Minor dt node + driver fixes (Rob)
- Added small panel example to the host controller binding

Changes since v2:
- Fixed commit tags (Emil)
---
.../display/imx/fsl,mipi-dsi-imx6.yaml | 139 ++++++++++++++++++
1 file changed, 139 insertions(+)
create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,mipi-dsi-imx6.yaml

diff --git a/Documentation/devicetree/bindings/display/imx/fsl,mipi-dsi-imx6.yaml b/Documentation/devicetree/bindings/display/imx/fsl,mipi-dsi-imx6.yaml
new file mode 100644
index 000000000000..10e289ea219a
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/imx/fsl,mipi-dsi-imx6.yaml
@@ -0,0 +1,139 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/imx/fsl,mipi-dsi-imx6.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale i.MX6 DW MIPI DSI Host Controller
+
+maintainers:
+ - Adrian Ratiu <adrian.ratiu@xxxxxxxxxxxxx>
+
+description: |
+ The i.MX6 DSI host controller is a Synopsys DesignWare MIPI DSI v1.01
+ IP block with a companion PHY IP.
+
+ These DT bindings follow the Synopsys DW MIPI DSI bindings defined in
+ Documentation/devicetree/bindings/display/bridge/dw_mipi_dsi.txt with
+ the following device-specific properties.
+
+properties:
+ compatible:
+ items:
+ - const: fsl,imx6q-mipi-dsi
+ - const: snps,dw-mipi-dsi
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: Module Clock
+ - description: DSI bus clock
+
+ clock-names:
+ items:
+ - const: ref
+ - const: pclk
+
+ fsl,gpr:
+ description: Phandle to the iomuxc-gpr region containing the multiplexer control register.
+ $ref: /schemas/types.yaml#/definitions/phandle
+
+ ports:
+ type: object
+ description: |
+ A node containing DSI input & output port nodes with endpoint
+ definitions as documented in
+ Documentation/devicetree/bindings/media/video-interfaces.txt
+ Documentation/devicetree/bindings/graph.txt
+ properties:
+ port@0:
+ type: object
+ description:
+ DSI input port node, connected to the ltdc rgb output port.
+
+ port@1:
+ type: object
+ description:
+ DSI output port node, connected to a panel or a bridge input port"
+
+patternProperties:
+ "^panel@[0-3]$":
+ type: object
+ description: |
+ A node containing the panel or bridge description as documented in
+ Documentation/devicetree/bindings/display/mipi-dsi-bus.txt
+ properties:
+ port:
+ type: object
+ description:
+ Panel or bridge port node, connected to the DSI output port (port@1)
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
+required:
+ - "#address-cells"
+ - "#size-cells"
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+ - ports
+
+additionalProperties: false
+
+examples:
+ - |+
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/imx6qdl-clock.h>
+ #include <dt-bindings/gpio/gpio.h>
+
+ dsi: dsi@21e0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx6q-mipi-dsi", "snps,dw-mipi-dsi";
+ reg = <0x021e0000 0x4000>;
+ interrupts = <0 102 IRQ_TYPE_LEVEL_HIGH>;
+ fsl,gpr = <&gpr>;
+ clocks = <&clks IMX6QDL_CLK_MIPI_CORE_CFG>,
+ <&clks IMX6QDL_CLK_MIPI_IPG>;
+ clock-names = "ref", "pclk";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@1 {
+ reg = <1>;
+ dsi_out: endpoint {
+ remote-endpoint = <&panel_in>;
+ };
+ };
+ };
+
+ panel@0 {
+ compatible = "sharp,ls032b3sx01";
+ reg = <0>;
+ reset-gpios = <&gpio6 8 GPIO_ACTIVE_LOW>;
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 {
+ reg = <0>;
+ panel_in: endpoint {
+ remote-endpoint = <&dsi_out>;
+ };
+ };
+ };
+ };
+ };
+
+...
--
2.26.0