[PATCH 0/8] Relax sanity checking for mismatched AArch32 EL1
From: Will Deacon
Date: Tue Apr 14 2020 - 17:31:34 EST
Hi all,
For better or worse, there are SoCs in production where some, but not
all of the CPUs, support AArch32 at EL1 and above. Right now, that
results in "SANITY CHECK" warnings during boot and an unconditional
kernel taint.
This patch series tries to do a bit better: the only time we care about
AArch32 at EL1 is for KVM, so rather than throw our toys out of the
pram, we can instead just disable support for 32-bit guests on these
systems. In the unlikely scenario of a late CPU hotplug being the first
time we notice that AArch32 is not available, then we fail the hotplug
(right now we let the thing come online, which leads to hilarious
results for any pre-existing 32-bit guests).
Feedback welcome,
Will
Cc: Suzuki K Poulose <suzuki.poulose@xxxxxxx>
Cc: Mark Rutland <mark.rutland@xxxxxxx>
Cc: Marc Zyngier <maz@xxxxxxxxxx>
Cc: Anshuman Khandual <anshuman.khandual@xxxxxxx>
Cc: Catalin Marinas <catalin.marinas@xxxxxxx>
Cc: Sai Prakash Ranjan <saiprakash.ranjan@xxxxxxxxxxxxxx>
Cc: Doug Anderson <dianders@xxxxxxxxxxxx>
Cc: kernel-team@xxxxxxxxxxx
--->8
Sai Prakash Ranjan (1):
arm64: cpufeature: Relax check for IESB support
Will Deacon (7):
arm64: cpufeature: Spell out register fields for ID_ISAR4 and ID_PFR1
arm64: cpufeature: Add CPU capability for AArch32 EL1 support
arm64: cpufeature: Remove redundant call to id_aa64pfr0_32bit_el0()
arm64: cpufeature: Factor out checking of AArch32 features
arm64: cpufeature: Relax AArch32 system checks if EL1 is 64-bit only
arm64: cpufeature: Relax checks for AArch32 support at EL[0-2]
arm64: cpufeature: Add an overview comment for the cpufeature
framework
arch/arm64/include/asm/cpucaps.h | 3 +-
arch/arm64/include/asm/cpufeature.h | 7 +
arch/arm64/include/asm/sysreg.h | 18 +++
arch/arm64/kernel/cpufeature.c | 236 +++++++++++++++++++++-------
arch/arm64/kvm/reset.c | 12 +-
5 files changed, 206 insertions(+), 70 deletions(-)
--
2.26.0.110.g2183baf09c-goog