Re: [PATCH v2 1/3] net: phy: mdio: add IPQ40xx MDIO driver
From: Russell King - ARM Linux admin
Date: Wed Apr 15 2020 - 05:33:57 EST
On Tue, Apr 14, 2020 at 08:10:11PM +0200, Robert Marko wrote:
> diff --git a/drivers/net/phy/mdio-ipq40xx.c b/drivers/net/phy/mdio-ipq40xx.c
> new file mode 100644
> index 000000000000..d8c11c621f20
> --- /dev/null
> +++ b/drivers/net/phy/mdio-ipq40xx.c
> @@ -0,0 +1,176 @@
> +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
> +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. */
> +/* Copyright (c) 2020 Sartura Ltd. */
> +
> +#include <linux/delay.h>
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/mutex.h>
> +#include <linux/io.h>
> +#include <linux/of_address.h>
> +#include <linux/of_mdio.h>
> +#include <linux/phy.h>
> +#include <linux/platform_device.h>
> +
Looking at how these registers are used, they could be renamed:
> +#define MDIO_CTRL_0_REG 0x40
This seems to be unused.
> +#define MDIO_CTRL_1_REG 0x44
MDIO_ADDR_REG
> +#define MDIO_CTRL_2_REG 0x48
MDIO_DATA_WRITE_REG
> +#define MDIO_CTRL_3_REG 0x4c
MDIO_DATA_READ_REG
> +#define MDIO_CTRL_4_REG 0x50
> +#define MDIO_CTRL_4_ACCESS_BUSY BIT(16)
> +#define MDIO_CTRL_4_ACCESS_START BIT(8)
> +#define MDIO_CTRL_4_ACCESS_CODE_READ 0
> +#define MDIO_CTRL_4_ACCESS_CODE_WRITE 1
MDIO_CMD_* ?
> +
> +#define IPQ40XX_MDIO_RETRY 1000
> +#define IPQ40XX_MDIO_DELAY 10
> +
> +struct ipq40xx_mdio_data {
> + void __iomem *membase;
> +};
> +
> +static int ipq40xx_mdio_wait_busy(struct mii_bus *bus)
> +{
> + struct ipq40xx_mdio_data *priv = bus->priv;
> + int i;
> +
> + for (i = 0; i < IPQ40XX_MDIO_RETRY; i++) {
> + unsigned int busy;
> +
> + busy = readl(priv->membase + MDIO_CTRL_4_REG) &
> + MDIO_CTRL_4_ACCESS_BUSY;
> + if (!busy)
> + return 0;
> +
> + /* BUSY might take to be cleard by 15~20 times of loop */
> + udelay(IPQ40XX_MDIO_DELAY);
> + }
> +
> + dev_err(bus->parent, "MDIO operation timed out\n");
> +
> + return -ETIMEDOUT;
> +}
> +
> +static int ipq40xx_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
> +{
> + struct ipq40xx_mdio_data *priv = bus->priv;
> + int value = 0;
> + unsigned int cmd = 0;
No need to initialise either of these, and you can eliminate "value"
which will then satisfy davem's requirement for reverse-christmas-tree
ordering of variable declarations.
> +
> + /* Reject clause 45 */
> + if (regnum & MII_ADDR_C45)
> + return -EOPNOTSUPP;
> +
> + if (ipq40xx_mdio_wait_busy(bus))
> + return -ETIMEDOUT;
> +
> + /* issue the phy address and reg */
> + writel((mii_id << 8) | regnum, priv->membase + MDIO_CTRL_1_REG);
> +
> + cmd = MDIO_CTRL_4_ACCESS_START | MDIO_CTRL_4_ACCESS_CODE_READ;
> +
> + /* issue read command */
> + writel(cmd, priv->membase + MDIO_CTRL_4_REG);
> +
> + /* Wait read complete */
> + if (ipq40xx_mdio_wait_busy(bus))
> + return -ETIMEDOUT;
> +
> + /* Read data */
> + value = readl(priv->membase + MDIO_CTRL_3_REG);
> +
> + return value;
> +}
> +
> +static int ipq40xx_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
> + u16 value)
> +{
> + struct ipq40xx_mdio_data *priv = bus->priv;
> + unsigned int cmd = 0;
No need to initialise cmd.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line in suburbia: sync at 10.2Mbps down 587kbps up