RE: [PATCH v7 2/2] Support 32-bit access for the TX/RX hold registers UTXH and URXH.

[Hyunki Koo]

On Thu, Apr 16, 2020 at 10:56:24PM +0900, Greg KH wrote:
> On Sat, Apr 11, 2020 at 09:33:24PM +0900, Hyunki Koo wrote:
> > From: Hyunki Koo <hyunki00.koo@xxxxxxxxxxx>
> >
> > This is required for some newer SoCs.
> >
> > Signed-off-by: Hyunki Koo <hyunki00.koo@xxxxxxxxxxx>
> > Reviewed-by: Krzysztof Kozlowski <krzk@xxxxxxxxxx> Tested on Odroid
> > HC1 (Exynos5422):
> > Tested-by: Krzysztof Kozlowski <krzk@xxxxxxxxxx>
> > ---
> > v2:
> > line 954 : change rd_regl to rd_reg in for backward compatibility.
> > line 2031: Add init value for ourport->port.iotype  to UPIO_MEM
> > v3:
> > line 2031: remove redundant init value  for ourport->port.iotype
> > v4:
> > correct variable types and change misleading function name
> > v5:
> > add dt-binding and go as first patch in this series.
> > v6:
> > no change in this patch, only chaged in [PATCH v6 1/2]
> > v7:
> > add reviewed by and tested by
> > ---
> 
> Your subject line changed for this and patch 2 :(
> 
> Also, I asked you to split this patch up better in the past, you seem to have
> ignored that :(
> 
> First patch would be to create the new functions and use them, with no
> functional change to the code as-is.  A second patch would add the new
> binding, and a third patch would be to add the new functionality.
> 
> And you need to describe all of this very well in your changelog, the one
> sentence here is not sufficient at all.
> 
> Please fix this all up and resend.
> 
> thanks,
> 
> greg k-h

Sorry I missed your comment in V4, I will split and update the patch and re-send.