RE: [RFC PATCH v2 09/13] perf vendor events: Add JSON metrics for imx8mm DDR Perf

From: Joakim Zhang
Date: Mon Apr 20 2020 - 00:17:50 EST

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> -----Original Message-----
> From: John Garry <john.garry@xxxxxxxxxx>
> Sent: 2020年4月17日 18:41
> To: peterz@xxxxxxxxxxxxx; mingo@xxxxxxxxxx; acme@xxxxxxxxxx;
> mark.rutland@xxxxxxx; alexander.shishkin@xxxxxxxxxxxxxxx;
> jolsa@xxxxxxxxxx; namhyung@xxxxxxxxxx; will@xxxxxxxxxx
> Cc: ak@xxxxxxxxxxxxxxx; linuxarm@xxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx;
> Joakim Zhang <qiangqing.zhang@xxxxxxx>; irogers@xxxxxxxxxx;
> robin.murphy@xxxxxxx; zhangshaokun@xxxxxxxxxxxxx;
> linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; John Garry <john.garry@xxxxxxxxxx>
> Subject: [RFC PATCH v2 09/13] perf vendor events: Add JSON metrics for
> imx8mm DDR Perf
>
> From: Joakim Zhang <qiangqing.zhang@xxxxxxx>
>
> Add JSON metrics for imx8mm DDR Perf.
>
> Signed-off-by: Joakim Zhang <qiangqing.zhang@xxxxxxx>
> Signed-off-by: John Garry <john.garry@xxxxxxxxxx>
> ---
> .../arch/arm64/freescale/imx8mm/sys/ddrc.json | 39
> ++++++++++++++++++++++
> .../arch/arm64/freescale/imx8mm/sys/metrics.json | 18 ++++++++++
> tools/perf/pmu-events/jevents.c | 1 +
> 3 files changed, 58 insertions(+)
> create mode 100644
> tools/perf/pmu-events/arch/arm64/freescale/imx8mm/sys/ddrc.json
> create mode 100644
> tools/perf/pmu-events/arch/arm64/freescale/imx8mm/sys/metrics.json
>
> diff --git
> a/tools/perf/pmu-events/arch/arm64/freescale/imx8mm/sys/ddrc.json
> b/tools/perf/pmu-events/arch/arm64/freescale/imx8mm/sys/ddrc.json
> new file mode 100644
> index 000000000000..8a3dae61a48f
> --- /dev/null
> +++ b/tools/perf/pmu-events/arch/arm64/freescale/imx8mm/sys/ddrc.json
> @@ -0,0 +1,39 @@
> +[
> + {
> + "BriefDescription": "ddr cycles event",
> + "EventCode": "0x00",
> + "EventName": "imx8_ddr.cycles",
> + "Unit": "imx8_ddr",
> + "Compat": "i.mx8mm"
> + },
> + {
> + "BriefDescription": "ddr read-cycles event",
> + "EventCode": "0x2a",
> + "EventName": "imx8_ddr.read_cycles",
> + "Unit": "imx8_ddr",
> + "Compat": "i.mx8mm"
> + },
> + {
> + "BriefDescription": "ddr write-cycles event",
> + "EventCode": "0x2b",
> + "EventName": "imx8_ddr.write_cycles",
> + "Unit": "imx8_ddr",
> + "Compat": "i.mx8mm"
> + },
> + {
> + "BriefDescription": "ddr read event",
> + "EventCode": "0x35",
> + "EventName": "imx8_ddr.read",
> + "Unit": "imx8_ddr",
> + "Compat": "i.mx8mm"
> + },
> + {
> + "BriefDescription": "ddr write event",
> + "EventCode": "0x38",
> + "EventName": "imx8_ddr.write",
> + "Unit": "imx8_ddr",
> + "Compat": "i.mx8mm"
> + }
> +]
Hi John,

Tested from branch: private-topic-perf-5.7-sys-pmu-events-v2

DDR events test is okay on both 8MM and 8QM.

> diff --git
> a/tools/perf/pmu-events/arch/arm64/freescale/imx8mm/sys/metrics.json
> b/tools/perf/pmu-events/arch/arm64/freescale/imx8mm/sys/metrics.json
> new file mode 100644
> index 000000000000..b6a776ca7cc2
> --- /dev/null
> +++ b/tools/perf/pmu-events/arch/arm64/freescale/imx8mm/sys/metrics.json
> @@ -0,0 +1,18 @@
> +[
> + {
> + "BriefDescription": "bytes all masters read from ddr based on
> read-cycles event",
> + "MetricName": "imx8mm_ddr_read.all",
> + "MetricExpr": "imx8_ddr.read_cycles * 4 * 4",
> + "ScaleUnit": "9.765625e-4MB",
> + "Unit": "imx8_ddr",
> + "Compat": "i.mx8mm"
> + },
> + {
> + "BriefDescription": "bytes all masters write to ddr based on
> write-cycles event",
> + "MetricName": "imx8mm_ddr_write.all",
> + "MetricExpr": "imx8_ddr.write_cycles * 4 * 4",
> + "ScaleUnit": "9.765625e-4MB",
> + "Unit": "imx8_ddr",
> + "Compat": "i.mx8mm"
> + }
> +]

However, it seems that there are small defects from metric.

Firstly, could you help change "ScaleUnit": "9.765625e-4MB" into "ScaleUnit": "9.765625e-4KB", this is a mistake.

Then, you can see that test is okay from 8MM. However, metric would add twice once time from 8QM which has two ddr perf(ddr0/ddr1), it looks incorrect.

8MM:
root@imx8mmevk:~# ./perf stat -v -a -I 1000 -M imx8mm_ddr_write.all
Using CPUID 0x00000000410fd030
metric expr imx8_ddr.write_cycles * 4 * 4 for imx8mm_ddr_write.all
found event imx8_ddr.write_cycles
adding {imx8_ddr.write_cycles}:W
imx8_ddr.write_cycles -> imx8_ddr0/event=0x2b/
imx8_ddr.write_cycles: 13153 1000495125 1000495125
# time counts unit events
1.000476625 13153 imx8_ddr.write_cycles # 205.5 MB imx8mm_ddr_write.all
imx8_ddr.write_cycles: 3582 1000681375 1000681375
2.001167750 3582 imx8_ddr.write_cycles # 56.0 MB imx8mm_ddr_write.all

8QM:
root@imx8qmmek:~# ./perf stat -v -a -I 1000 -M imx8qm_ddr_read.all
Using CPUID 0x00000000410fd030
metric expr imx8_ddr.read_cycles * 4 * 4 for imx8qm_ddr_read.all
found event imx8_ddr.read_cycles
metric expr imx8_ddr.read_cycles * 4 * 4 for imx8qm_ddr_read.all
found event imx8_ddr.read_cycles
adding {imx8_ddr.read_cycles}:W,{imx8_ddr.read_cycles}:W
imx8_ddr.read_cycles -> imx8_ddr0/event=0x2a/
imx8_ddr.read_cycles -> imx8_ddr1/event=0x2a/
imx8_ddr.read_cycles -> imx8_ddr0/event=0x2a/
imx8_ddr.read_cycles -> imx8_ddr1/event=0x2a/
imx8_ddr.read_cycles: 22748 1000378750 1000378750
imx8_ddr.read_cycles: 24640 1000376625 1000376625
imx8_ddr.read_cycles: 22800 1000375125 1000375125
imx8_ddr.read_cycles: 24616 1000372625 1000372625
# time counts unit events
1.000377250 47388 imx8_ddr.read_cycles # 740.4 MB imx8qm_ddr_read.all
1.000377250 47416 imx8_ddr.read_cycles
imx8_ddr.read_cycles: 32672 1000454375 1000454375
imx8_ddr.read_cycles: 37888 1000457250 1000457250
imx8_ddr.read_cycles: 32736 1000460250 1000460250
imx8_ddr.read_cycles: 38012 1000463000 1000463000
2.000812375 70560 imx8_ddr.read_cycles # 1102.5 MB imx8qm_ddr_read.all
2.000812375 70748 imx8_ddr.read_cycles

Best Regards,
Joakim Zhang
> \ No newline at end of file
> diff --git a/tools/perf/pmu-events/jevents.c b/tools/perf/pmu-events/jevents.c
> index 76a84ec2ffc8..efdade0194af 100644
> --- a/tools/perf/pmu-events/jevents.c
> +++ b/tools/perf/pmu-events/jevents.c
> @@ -257,6 +257,7 @@ static struct map {
> { "hisi_sccl,hha", "hisi_sccl,hha" },
> { "hisi_sccl,l3c", "hisi_sccl,l3c" },
> /* it's not realistic to keep adding these, we need something more
> scalable ... */
> + { "imx8_ddr", "imx8_ddr" },
> { "smmuv3_pmcg", "smmuv3_pmcg" },
> { "L3PMC", "amd_l3" },
> {}
> --
> 2.16.4

Next message: Ramuthevar, Vadivel MuruganX: "Re: [PATCH v2 2/2] mtd: rawnand: Add NAND controller support on Intel LGM SoC"
Previous message: Tiezhu Yang: "Re: [PATCH 3/4] kmod: Return directly if module name is empty in request_module()"
In reply to: John Garry: "[RFC PATCH v2 09/13] perf vendor events: Add JSON metrics for imx8mm DDR Perf"
Next in thread: John Garry: "Re: [RFC PATCH v2 09/13] perf vendor events: Add JSON metrics for imx8mm DDR Perf"
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