Re: [PATCH] mtd: spi-nor: fix 4-byte opcode support for w25q256

From: Tudor.Ambarus
Date: Tue Apr 21 2020 - 02:59:03 EST


On Tuesday, April 21, 2020 9:08:30 AM EEST Mantas wrote:
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> On 2020-04-20 13:53, Tudor.Ambarus@xxxxxxxxxxxxx wrote:
> > On Wednesday, April 15, 2020 4:48:30 PM EEST Mantas Pucka wrote:
> >> EXTERNAL EMAIL: Do not click links or open attachments unless you know
> >> the
> >> content is safe
> >>
> >> There are 2 different chips (w25q256fv and w25q256jv) that share
> >> the same JEDEC ID. Only w25q256jv fully supports 4-byte opcodes.
> >> Use SFDP header version to differentiate between them.
> >>
> >> Signed-off-by: Mantas Pucka <mantas@xxxxxxxxxxxx>
> >> ---
> >>
> >> drivers/mtd/spi-nor/sfdp.c | 4 ----
> >> drivers/mtd/spi-nor/sfdp.h | 6 ++++++
> >> drivers/mtd/spi-nor/winbond.c | 30 ++++++++++++++++++++++++++++--
> >> 3 files changed, 34 insertions(+), 6 deletions(-)
> >>
> >> diff --git a/drivers/mtd/spi-nor/sfdp.c b/drivers/mtd/spi-nor/sfdp.c
> >> index f6038d3..27838f6 100644
> >> --- a/drivers/mtd/spi-nor/sfdp.c
> >> +++ b/drivers/mtd/spi-nor/sfdp.c
> >> @@ -21,10 +21,6 @@
> >>
> >> #define SFDP_4BAIT_ID 0xff84 /* 4-byte Address Instruction
> >> Table
> >>
> >> */
> >>
> >> #define SFDP_SIGNATURE 0x50444653U
> >>
> >> -#define SFDP_JESD216_MAJOR 1
> >> -#define SFDP_JESD216_MINOR 0
> >> -#define SFDP_JESD216A_MINOR 5
> >> -#define SFDP_JESD216B_MINOR 6
> >>
> >> struct sfdp_header {
> >>
> >> u32 signature; /* Ox50444653U <=> "SFDP" */
> >>
> >> diff --git a/drivers/mtd/spi-nor/sfdp.h b/drivers/mtd/spi-nor/sfdp.h
> >> index e0a8ded..b84abd0 100644
> >> --- a/drivers/mtd/spi-nor/sfdp.h
> >> +++ b/drivers/mtd/spi-nor/sfdp.h
> >> @@ -7,6 +7,12 @@
> >>
> >> #ifndef __LINUX_MTD_SFDP_H
> >> #define __LINUX_MTD_SFDP_H
> >>
> >> +/* SFDP revisions */
> >> +#define SFDP_JESD216_MAJOR 1
> >> +#define SFDP_JESD216_MINOR 0
> >> +#define SFDP_JESD216A_MINOR 5
> >> +#define SFDP_JESD216B_MINOR 6
> >> +
> >>
> >> /* Basic Flash Parameter Table */
> >>
> >> /*
> >>
> >> diff --git a/drivers/mtd/spi-nor/winbond.c
> >> b/drivers/mtd/spi-nor/winbond.c
> >> index 17deaba..50b2478 100644
> >> --- a/drivers/mtd/spi-nor/winbond.c
> >> +++ b/drivers/mtd/spi-nor/winbond.c
> >> @@ -8,6 +8,32 @@
> >>
> >> #include "core.h"
> >>
> >> +static int
> >> +w25q256_post_bfpt_fixups(struct spi_nor *nor,
> >> + const struct sfdp_parameter_header *bfpt_header,
> >> + const struct sfdp_bfpt *bfpt,
> >> + struct spi_nor_flash_parameter *params)
> >> +{
> >> + /*
> >> + * W25Q256JV supports 4B opcodes but W25Q256FV does not.
> >> + * Unfortunately, Winbond has re-used the same JEDEC ID for both
> >> + * variants which prevents us from defining a new entry in the
> >> parts + * table.
> >> + * To differentiate between W25Q256JV and W25Q256FV check SFDP
> >> header + * version: only JV has JESD216A compliant structure
> >> (version 5) + */
> >> +
> >> + if (bfpt_header->major == SFDP_JESD216_MAJOR &&
> >> + bfpt_header->minor == SFDP_JESD216A_MINOR)
> >
> > Not sure if this is generic enough. Are you sure that the JV version will
> > never have an update for the sfdp tables?
>
> No, I'm not sure. I also don't know about other changes that may come
> with a version update: will it have 4B opcode table? will it be

new 4bait table will just OR the SNOR_F_4B_OPCODES flags, no problem with
that.

> different version again (say KV) with it's own quirks? Fix only what
> needs fixing was the idea. But I guess chances of new chip with no 4B
> opcodes and new SFDP table are pretty slim, so I'm OK with having >= in v2.

stripping 4B opcodes from a revision to another would be a first, but you're
right, we can fix others when needed, so no need for a v2.
>
> >> + nor->flags |= SNOR_F_4B_OPCODES;
> >> +
> >> + return 0;
> >> +}
> >> +
> >> +static struct spi_nor_fixups w25q256_fixups = {
> >> + .post_bfpt = w25q256_post_bfpt_fixups,
> >> +};
> >> +
> >
> > If the post_bfpt hook is called, you already have a valid bfpt table. If
> > the differentiator between the JV and FV versions is that only the JV
> > defines the SFDP tables, then your w25q256_post_bfpt_fixups() can look
> > as:
> >
> > static int w25q256_post_bfpt_fixups()
> > {
> >
> > nor->flags |= SNOR_F_4B_OPCODES;
> > return 0;
> >
> > }
>
> FV chip that I have, do actually have SFDP tables (with
> minor_version==0). I've saw Chuanhong reporting that some FV chips don't
> have SFDP, but certainly this is not the case for all of them.
>
oh, the horror :). I think I have a w25q256 somewhere, allow me some time to
do some tests.

Cheers,
ta