Re: [PATCH v7 2/3] hw_random: cctrng: introduce Arm CryptoCell driver

[Geert Uytterhoeven]

Hi Hadar,

On Tue, Apr 21, 2020 at 5:13 PM Hadar Gat <Hadar.Gat@xxxxxxx> wrote:
> > From: Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>
> > On Tue, Apr 21, 2020 at 3:16 PM Hadar Gat <Hadar.Gat@xxxxxxx> wrote:
> > > > From: Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>
> > > > Sent: Monday, 20 April 2020 16:45
> > > > On Fri, Mar 27, 2020 at 7:11 AM Hadar Gat <hadar.gat@xxxxxxx> wrote:
> > > > > Introduce low level Arm CryptoCell TRNG HW support.
> > > > > --- /dev/null
> > > > > +++ b/drivers/char/hw_random/cctrng.c
> > > >
> > > > > +static int cctrng_probe(struct platform_device *pdev) {

> > > > > +       /* register the driver isr function */
> > > > > +       rc = devm_request_irq(dev, irq, cc_isr, IRQF_SHARED,
> > > > > + "cctrng", drvdata);
> > > >
> > > > Shoudn't this be done after clearing the pending interrupts below?
> > >
> > > I'm not sure what do you mean in your question...
> > > I assume you're suggesting that the registration of the driver ISR function
> > should be done only after clearing the pending interrupts?!
> >
> > Indeed.
> >
> > > Anyway, any pending interrupt that might exist is irrelevant to the
> > > current cctrng driver which just started (we're in the probe function)
> >
> > If there is a pending interrupt, your interrupt handler (which returns
> > IRQ_NONE in this case) will be called repeatedly, until the driver gets to
> > clearing the pending interrupts below, or until the interrupt core decides to
> > give up, and disable it for good.
>
> Ok, I get your point now.
> But note that when the cctrng HW boots, the default is that all interrupts are masked, hence the interrupt handler will not be called.

Is that also the case when booting into a new kernel using kexec?

> The unmask of the RNG interrupts is done afterwards and only then ISR may potentially be called.

> > > > > +       if (rc) {
> > > > > +               dev_err(dev, "Could not register to interrupt %d\n", irq);
> > > > > +               goto post_clk_err;
> > > > > +       }
> > > > > +       dev_dbg(dev, "Registered to IRQ: %d\n", irq);
> > > > > +
> > > > > +       /* Clear all pending interrupts */
> > > > > +       val = cc_ioread(drvdata, CC_HOST_RGF_IRR_REG_OFFSET);
> > > > > +       dev_dbg(dev, "IRR=0x%08X\n", val);
> > > > > +       cc_iowrite(drvdata, CC_HOST_RGF_ICR_REG_OFFSET, val);
> > > >
> > > > The above accesses the engine's registers...
> > >
> > > That is right.
> > >
> > > > > +
> > > > > +       /* unmask HOST RNG interrupt */
> > > > > +       cc_iowrite(drvdata, CC_HOST_RGF_IMR_REG_OFFSET,
> > > > > +                  cc_ioread(drvdata, CC_HOST_RGF_IMR_REG_OFFSET) &
> > > > > +                  ~CC_HOST_RNG_IRQ_MASK);
>
> The above unmask the RNG interrupt.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds