[tip: sched/urgent] x86, sched: Account for CPUs with less than 4 cores in freq. invariance

[tip-bot2 for Giovanni Gherdovich]

The following commit has been merged into the sched/urgent branch of tip:

Commit-ID:     23ccee22e834eca236b9a20989caf6905bd6954a
Gitweb:        https://git.kernel.org/tip/23ccee22e834eca236b9a20989caf6905bd6954a
Author:        Giovanni Gherdovich <ggherdovich@xxxxxxx>
AuthorDate:    Thu, 16 Apr 2020 07:47:43 +02:00
Committer:     Peter Zijlstra <peterz@xxxxxxxxxxxxx>
CommitterDate: Wed, 22 Apr 2020 23:10:13 +02:00

x86, sched: Account for CPUs with less than 4 cores in freq. invariance

If a CPU has less than 4 physical cores, MSR_TURBO_RATIO_LIMIT will
rightfully report that the 4C turbo ratio is zero. In such cases, use the
1C turbo ratio instead for frequency invariance calculations.

Fixes: 1567c3e3467c ("x86, sched: Add support for frequency invariance")
Reported-by: Like Xu <like.xu@xxxxxxxxxxxxxxx>
Reported-by: Neil Rickert <nwr10cst-oslnx@xxxxxxxxx>
Signed-off-by: Giovanni Gherdovich <ggherdovich@xxxxxxx>
Signed-off-by: Peter Zijlstra (Intel) <peterz@xxxxxxxxxxxxx>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@xxxxxxxxx>
Tested-by: Dave Kleikamp <dave.kleikamp@xxxxxxxxxx>
Link: https://lkml.kernel.org/r/20200416054745.740-3-ggherdovich@xxxxxxx
---
 arch/x86/kernel/smpboot.c | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 3a318ec..5d346b7 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -1945,18 +1945,23 @@ static bool skx_set_max_freq_ratio(u64 *base_freq, u64 *turbo_freq, int size)
 
 static bool core_set_max_freq_ratio(u64 *base_freq, u64 *turbo_freq)
 {
+	u64 msr;
 	int err;
 
 	err = rdmsrl_safe(MSR_PLATFORM_INFO, base_freq);
 	if (err)
 		return false;
 
-	err = rdmsrl_safe(MSR_TURBO_RATIO_LIMIT, turbo_freq);
+	err = rdmsrl_safe(MSR_TURBO_RATIO_LIMIT, &msr);
 	if (err)
 		return false;
 
-	*base_freq = (*base_freq >> 8) & 0xFF;      /* max P state */
-	*turbo_freq = (*turbo_freq >> 24) & 0xFF;   /* 4C turbo    */
+	*base_freq = (*base_freq >> 8) & 0xFF;    /* max P state */
+	*turbo_freq = (msr >> 24) & 0xFF;         /* 4C turbo    */
+
+	/* The CPU may have less than 4 cores */
+	if (!*turbo_freq)
+		*turbo_freq = msr & 0xFF;         /* 1C turbo    */
 
 	return true;
 }