Re: [PATCH tip/core/rcu 2/6] Documentation/memory-barriers.txt: ACCESS_ONCE() provides cache coherence

[Jon Masters]

Hi Paul,

On 2/17/14 4:26 PM, Paul E. McKenney wrote:

> The ACCESS_ONCE() primitive provides cache coherence, but the
> documentation does not clearly state this.  This commit therefore upgrades
> the documentation.

<snip>

> +     In short, ACCESS_ONCE() provides "cache coherence" for accesses from
> +     multiple CPUs to a single variable.

(ACCESS_ONCE is now READ_ONCE/WRITE_ONCE but the above added the 
original language around cache coherence)

I would argue that we might want to avoid describing it in this manner. 
The hardware provides cache coherency in order to keep a single memory 
location coherent between multiple observers. These kernel macros only 
tell the compiler to perform the load once. They take advantage of the 
properties of coherence in the presence of multiple observers.

Jon.

--
Computer Architect