Re: [PATCH 05/11] ASoC: qcom: lpass: Add support for newer lpass version

From: Ajit Pandey
Date: Sat Apr 25 2020 - 10:15:31 EST

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On 4/16/2020 1:26 PM, Srinivas Kandagatla wrote:

On 11/04/2020 09:02, Ajit Pandey wrote:

Few control registers bit offset of lpaif in newer lpass variants
are changed. Added "id" field in variant struct and changes macros
configuration of registers to calculate bit mask & offset based on
variant id.

These fields are handled much nicely with regmap_field, you should consider using that. If not we will add overhead of check for every mask.

Sure i'll tryÂ to add this support using regmap_field API's during v2 patch chain

Thanks & Regards

Ajit

Signed-off-by: Ajit Pandey <ajitp@xxxxxxxxxxxxxx>
---
Â sound/soc/qcom/lpass-cpu.cÂÂÂÂÂÂ |Â 77 +++++++++--------
Â sound/soc/qcom/lpass-lpaif-reg.h | 182 ++++++++++++++++++++++++++++++++++++++-
Â sound/soc/qcom/lpass-platform.cÂ |Â 31 +++----
Â sound/soc/qcom/lpass.hÂÂÂÂÂÂÂÂÂÂ |ÂÂ 6 ++
Â 4 files changed, 241 insertions(+), 55 deletions(-)

diff --git a/sound/soc/qcom/lpass-cpu.c b/sound/soc/qcom/lpass-cpu.c
index f177932..006ba5a 100644
--- a/sound/soc/qcom/lpass-cpu.c
+++ b/sound/soc/qcom/lpass-cpu.c
@@ -77,6 +77,7 @@ static int lpass_cpu_daiops_hw_params(struct snd_pcm_substream *substream,
Â {
ÂÂÂÂÂ struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai);
ÂÂÂÂÂ struct lpass_dai *dai_data = drvdata->dai_priv[dai->driver->id];
+ÂÂÂ struct lpass_variant *v = drvdata->variant;
ÂÂÂÂÂ snd_pcm_format_t format = params_format(params);
ÂÂÂÂÂ unsigned int channels = params_channels(params);
ÂÂÂÂÂ unsigned int rate = params_rate(params);
@@ -89,18 +90,18 @@ static int lpass_cpu_daiops_hw_params(struct snd_pcm_substream *substream,
ÂÂÂÂÂÂÂÂÂ return bitwidth;
ÂÂÂÂÂ }
Â -ÂÂÂ regval = LPAIF_I2SCTL_LOOPBACK_DISABLE |
-ÂÂÂÂÂÂÂÂÂÂÂ LPAIF_I2SCTL_WSSRC_INTERNAL;
+ÂÂÂ regval = LPAIF_I2SCTL(v, LOOPBACK_DISABLE);
+ÂÂÂ regval |= LPAIF_I2SCTL(v, WSSRC_INTERNAL);
Â ÂÂÂÂÂ switch (bitwidth) {
ÂÂÂÂÂ case 16:
-ÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL_BITWIDTH_16;
+ÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL(v, BITWIDTH_16);
ÂÂÂÂÂÂÂÂÂ break;
ÂÂÂÂÂ case 24:
-ÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL_BITWIDTH_24;
+ÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL(v, BITWIDTH_24);
ÂÂÂÂÂÂÂÂÂ break;
ÂÂÂÂÂ case 32:
-ÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL_BITWIDTH_32;
+ÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL(v, BITWIDTH_32);
ÂÂÂÂÂÂÂÂÂ break;
ÂÂÂÂÂ default:
ÂÂÂÂÂÂÂÂÂ dev_err(dai->dev, "invalid bitwidth given: %d\n", bitwidth);
@@ -110,24 +111,24 @@ static int lpass_cpu_daiops_hw_params(struct snd_pcm_substream *substream,
ÂÂÂÂÂ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
ÂÂÂÂÂÂÂÂÂ switch (channels) {
ÂÂÂÂÂÂÂÂÂ case 1:
-ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL_SPKMODE_SD0;
-ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL_SPKMONO_MONO;
+ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL(v, SPKMODE_SD0);
+ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL(v, SPKMONO_MONO);
ÂÂÂÂÂÂÂÂÂÂÂÂÂ break;
ÂÂÂÂÂÂÂÂÂ case 2:
-ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL_SPKMODE_SD0;
-ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL_SPKMONO_STEREO;
+ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL(v, SPKMODE_SD0);
+ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL(v, SPKMONO_STEREO);
ÂÂÂÂÂÂÂÂÂÂÂÂÂ break;
ÂÂÂÂÂÂÂÂÂ case 4:
-ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL_SPKMODE_QUAD01;
-ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL_SPKMONO_STEREO;
+ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL(v, SPKMODE_QUAD01);
+ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL(v, SPKMONO_STEREO);
ÂÂÂÂÂÂÂÂÂÂÂÂÂ break;
ÂÂÂÂÂÂÂÂÂ case 6:
-ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL_SPKMODE_6CH;
-ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL_SPKMONO_STEREO;
+ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL(v, SPKMODE_6CH);
+ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL(v, SPKMONO_STEREO);
ÂÂÂÂÂÂÂÂÂÂÂÂÂ break;
ÂÂÂÂÂÂÂÂÂ case 8:
-ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL_SPKMODE_8CH;
-ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL_SPKMONO_STEREO;
+ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL(v, SPKMODE_8CH);
+ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL(v, SPKMONO_STEREO);
ÂÂÂÂÂÂÂÂÂÂÂÂÂ break;
ÂÂÂÂÂÂÂÂÂ default:
ÂÂÂÂÂÂÂÂÂÂÂÂÂ dev_err(dai->dev, "invalid channels given: %u\n",
@@ -137,24 +138,24 @@ static int lpass_cpu_daiops_hw_params(struct snd_pcm_substream *substream,
ÂÂÂÂÂ } else {
ÂÂÂÂÂÂÂÂÂ switch (channels) {
ÂÂÂÂÂÂÂÂÂ case 1:
-ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL_MICMODE_SD0;
-ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL_MICMONO_MONO;
+ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL(v, MICMODE_SD0);
+ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL(v, MICMONO_MONO);
ÂÂÂÂÂÂÂÂÂÂÂÂÂ break;
ÂÂÂÂÂÂÂÂÂ case 2:
-ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL_MICMODE_SD0;
-ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL_MICMONO_STEREO;
+ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL(v, MICMODE_SD0);
+ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL(v, MICMONO_STEREO);
ÂÂÂÂÂÂÂÂÂÂÂÂÂ break;
ÂÂÂÂÂÂÂÂÂ case 4:
-ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL_MICMODE_QUAD01;
-ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL_MICMONO_STEREO;
+ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL(v, MICMODE_QUAD01);
+ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL(v, MICMONO_STEREO);
ÂÂÂÂÂÂÂÂÂÂÂÂÂ break;
ÂÂÂÂÂÂÂÂÂ case 6:
-ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL_MICMODE_6CH;
-ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL_MICMONO_STEREO;
+ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL(v, MICMODE_6CH);
+ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL(v, MICMONO_STEREO);
ÂÂÂÂÂÂÂÂÂÂÂÂÂ break;
ÂÂÂÂÂÂÂÂÂ case 8:
-ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL_MICMODE_8CH;
-ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL_MICMONO_STEREO;
+ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL(v, MICMODE_8CH);
+ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_I2SCTL(v, MICMONO_STEREO);
ÂÂÂÂÂÂÂÂÂÂÂÂÂ break;
ÂÂÂÂÂÂÂÂÂ default:
ÂÂÂÂÂÂÂÂÂÂÂÂÂ dev_err(dai->dev, "invalid channels given: %u\n",
@@ -200,15 +201,16 @@ static int lpass_cpu_daiops_prepare(struct snd_pcm_substream *substream,
ÂÂÂÂÂÂÂÂÂ struct snd_soc_dai *dai)
Â {
ÂÂÂÂÂ struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai);
+ÂÂÂ struct lpass_variant *v = drvdata->variant;
ÂÂÂÂÂ int ret;
ÂÂÂÂÂ unsigned int val, mask;
Â ÂÂÂÂÂ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
-ÂÂÂÂÂÂÂ val = LPAIF_I2SCTL_SPKEN_ENABLE;
-ÂÂÂÂÂÂÂ mask = LPAIF_I2SCTL_SPKEN_MASK;
+ÂÂÂÂÂÂÂ val = LPAIF_I2SCTL(v, SPKEN_ENABLE);
+ÂÂÂÂÂÂÂ mask = LPAIF_I2SCTL(v, SPKEN_MASK);
ÂÂÂÂÂ } elseÂ {
-ÂÂÂÂÂÂÂ val = LPAIF_I2SCTL_MICEN_ENABLE;
-ÂÂÂÂÂÂÂ mask = LPAIF_I2SCTL_MICEN_MASK;
+ÂÂÂÂÂÂÂ val = LPAIF_I2SCTL(v, MICEN_ENABLE);
+ÂÂÂÂÂÂÂ mask = LPAIF_I2SCTL(v, MICEN_MASK);
ÂÂÂÂÂ }
Â ÂÂÂÂÂ ret = regmap_update_bits(drvdata->lpaif_map,
@@ -224,6 +226,7 @@ static int lpass_cpu_daiops_trigger(struct snd_pcm_substream *substream,
ÂÂÂÂÂÂÂÂÂ int cmd, struct snd_soc_dai *dai)
Â {
ÂÂÂÂÂ struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai);
+ÂÂÂ struct lpass_variant *v = drvdata->variant;
ÂÂÂÂÂ int ret = -EINVAL;
ÂÂÂÂÂ unsigned int val, mask;
Â @@ -232,11 +235,11 @@ static int lpass_cpu_daiops_trigger(struct snd_pcm_substream *substream,
ÂÂÂÂÂ case SNDRV_PCM_TRIGGER_RESUME:
ÂÂÂÂÂ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
ÂÂÂÂÂÂÂÂÂ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
-ÂÂÂÂÂÂÂÂÂÂÂ val = LPAIF_I2SCTL_SPKEN_ENABLE;
-ÂÂÂÂÂÂÂÂÂÂÂ mask = LPAIF_I2SCTL_SPKEN_MASK;
+ÂÂÂÂÂÂÂÂÂÂÂ val = LPAIF_I2SCTL(v, SPKEN_ENABLE);
+ÂÂÂÂÂÂÂÂÂÂÂ mask = LPAIF_I2SCTL(v, SPKEN_MASK);
ÂÂÂÂÂÂÂÂÂ } elseÂ {
-ÂÂÂÂÂÂÂÂÂÂÂ val = LPAIF_I2SCTL_MICEN_ENABLE;
-ÂÂÂÂÂÂÂÂÂÂÂ mask = LPAIF_I2SCTL_MICEN_MASK;
+ÂÂÂÂÂÂÂÂÂÂÂ val = LPAIF_I2SCTL(v, MICEN_ENABLE);
+ÂÂÂÂÂÂÂÂÂÂÂ mask = LPAIF_I2SCTL(v, MICEN_MASK);
ÂÂÂÂÂÂÂÂÂ }
Â ÂÂÂÂÂÂÂÂÂ ret = regmap_update_bits(drvdata->lpaif_map,
@@ -251,11 +254,11 @@ static int lpass_cpu_daiops_trigger(struct snd_pcm_substream *substream,
ÂÂÂÂÂ case SNDRV_PCM_TRIGGER_SUSPEND:
ÂÂÂÂÂ case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
ÂÂÂÂÂÂÂÂÂ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
-ÂÂÂÂÂÂÂÂÂÂÂ val = LPAIF_I2SCTL_SPKEN_DISABLE;
-ÂÂÂÂÂÂÂÂÂÂÂ mask = LPAIF_I2SCTL_SPKEN_MASK;
+ÂÂÂÂÂÂÂÂÂÂÂ val = LPAIF_I2SCTL(v, SPKEN_DISABLE);
+ÂÂÂÂÂÂÂÂÂÂÂ mask = LPAIF_I2SCTL(v, SPKEN_MASK);
ÂÂÂÂÂÂÂÂÂ } elseÂ {
-ÂÂÂÂÂÂÂÂÂÂÂ val = LPAIF_I2SCTL_MICEN_DISABLE;
-ÂÂÂÂÂÂÂÂÂÂÂ mask = LPAIF_I2SCTL_MICEN_MASK;
+ÂÂÂÂÂÂÂÂÂÂÂ val = LPAIF_I2SCTL(v, MICEN_DISABLE);
+ÂÂÂÂÂÂÂÂÂÂÂ mask = LPAIF_I2SCTL(v, MICEN_MASK);
ÂÂÂÂÂÂÂÂÂ }
Â ÂÂÂÂÂÂÂÂÂ ret = regmap_update_bits(drvdata->lpaif_map,
diff --git a/sound/soc/qcom/lpass-lpaif-reg.h b/sound/soc/qcom/lpass-lpaif-reg.h
index 3d74ae1..4251aa6 100644
--- a/sound/soc/qcom/lpass-lpaif-reg.h
+++ b/sound/soc/qcom/lpass-lpaif-reg.h
@@ -17,11 +17,28 @@
Â #define LPAIF_I2SCTL_LOOPBACK_DISABLEÂÂÂ (0 << LPAIF_I2SCTL_LOOPBACK_SHIFT)
Â #define LPAIF_I2SCTL_LOOPBACK_ENABLEÂÂÂ (1 << LPAIF_I2SCTL_LOOPBACK_SHIFT)
Â +#define LPAIF_I2SCTL_LOOPBACK_MASK_V2ÂÂÂÂ 0x20000
+#define LPAIF_I2SCTL_LOOPBACK_SHIFT_V2ÂÂÂÂ 17
+#define LPAIF_I2SCTL_LOOPBACK_DISABLE_V2 (0 << LPAIF_I2SCTL_LOOPBACK_SHIFT_V2)
+#define LPAIF_I2SCTL_LOOPBACK_ENABLE_V2ÂÂÂÂ (1 << LPAIF_I2SCTL_LOOPBACK_SHIFT_V2)
+
Â #define LPAIF_I2SCTL_SPKEN_MASKÂÂÂÂÂÂÂ 0x4000
Â #define LPAIF_I2SCTL_SPKEN_SHIFTÂÂÂ 14
Â #define LPAIF_I2SCTL_SPKEN_DISABLEÂÂÂ (0 << LPAIF_I2SCTL_SPKEN_SHIFT)
Â #define LPAIF_I2SCTL_SPKEN_ENABLEÂÂÂ (1 << LPAIF_I2SCTL_SPKEN_SHIFT)
Â +#define LPAIF_I2SCTL_SPKEN_MASK_V2ÂÂÂ 0x10000
+#define LPAIF_I2SCTL_SPKEN_SHIFT_V2ÂÂÂ 16
+#define LPAIF_I2SCTL_SPKEN_DISABLE_V2ÂÂÂ (0 << LPAIF_I2SCTL_SPKEN_SHIFT_V2)
+#define LPAIF_I2SCTL_SPKEN_ENABLE_V2ÂÂÂ (1 << LPAIF_I2SCTL_SPKEN_SHIFT_V2)
+
+#define __LPAIF_I2S_CTL(v, bit)Â \
+ÂÂÂ ((v->id ==Â LPASS_VARIANT_V2) ? \
+ÂÂÂÂÂÂÂ LPAIF_I2SCTL_##bit##_V2 : \
+ÂÂÂÂÂÂÂ LPAIF_I2SCTL_##bit)
+
+#define LPAIF_I2SCTL(v, bit)ÂÂÂÂÂÂÂ __LPAIF_I2S_CTL(v, bit)
+
Â #define LPAIF_I2SCTL_SPKMODE_MASKÂÂÂ 0x3C00
Â #define LPAIF_I2SCTL_SPKMODE_SHIFTÂÂÂ 10
Â #define LPAIF_I2SCTL_SPKMODE_NONEÂÂÂ (0 << LPAIF_I2SCTL_SPKMODE_SHIFT)
@@ -34,16 +51,49 @@
Â #define LPAIF_I2SCTL_SPKMODE_6CHÂÂÂ (7 << LPAIF_I2SCTL_SPKMODE_SHIFT)
Â #define LPAIF_I2SCTL_SPKMODE_8CHÂÂÂ (8 << LPAIF_I2SCTL_SPKMODE_SHIFT)
Â +#define LPAIF_I2SCTL_SPKMODE_MASK_V2ÂÂÂ 0xF800
+#define LPAIF_I2SCTL_SPKMODE_SHIFT_V2ÂÂÂ 11
+#define LPAIF_I2SCTL_SPKMODE_NONE_V2ÂÂÂ (0 << LPAIF_I2SCTL_SPKMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_SPKMODE_SD0_V2ÂÂÂ (1 << LPAIF_I2SCTL_SPKMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_SPKMODE_SD1_V2ÂÂÂ (2 << LPAIF_I2SCTL_SPKMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_SPKMODE_SD2_V2ÂÂÂ (3 << LPAIF_I2SCTL_SPKMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_SPKMODE_SD3_V2ÂÂÂ (4 << LPAIF_I2SCTL_SPKMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_SPKMODE_QUAD01_V2ÂÂÂ (5 << LPAIF_I2SCTL_SPKMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_SPKMODE_QUAD23_V2ÂÂÂ (6 << LPAIF_I2SCTL_SPKMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_SPKMODE_6CH_V2ÂÂÂ (7 << LPAIF_I2SCTL_SPKMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_SPKMODE_8CH_V2ÂÂÂ (8 << LPAIF_I2SCTL_SPKMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_SPKMODE_10CH_V2ÂÂÂ (9 << LPAIF_I2SCTL_SPKMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_SPKMODE_12CH_V2ÂÂÂ (10 << LPAIF_I2SCTL_SPKMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_SPKMODE_14CH_V2ÂÂÂ (11 << LPAIF_I2SCTL_SPKMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_SPKMODE_16CH_V2ÂÂÂ (12 << LPAIF_I2SCTL_SPKMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_SPKMODE_SD4_V2ÂÂÂ (13 << LPAIF_I2SCTL_SPKMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_SPKMODE_SD5_V2ÂÂÂ (14 << LPAIF_I2SCTL_SPKMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_SPKMODE_SD6_V2ÂÂÂ (15 << LPAIF_I2SCTL_SPKMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_SPKMODE_SD7_V2ÂÂÂ (16 << LPAIF_I2SCTL_SPKMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_SPKMODE_QUAD45_V2ÂÂÂ (17 << LPAIF_I2SCTL_SPKMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_SPKMODE_QUAD47_V2ÂÂÂ (18 << LPAIF_I2SCTL_SPKMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_SPKMODE_8CH_2_V2ÂÂÂ (19 << LPAIF_I2SCTL_SPKMODE_SHIFT_V2)
+
Â #define LPAIF_I2SCTL_SPKMONO_MASKÂÂÂ 0x0200
Â #define LPAIF_I2SCTL_SPKMONO_SHIFTÂÂÂ 9
Â #define LPAIF_I2SCTL_SPKMONO_STEREOÂÂÂ (0 << LPAIF_I2SCTL_SPKMONO_SHIFT)
Â #define LPAIF_I2SCTL_SPKMONO_MONOÂÂÂ (1 << LPAIF_I2SCTL_SPKMONO_SHIFT)
Â +#define LPAIF_I2SCTL_SPKMONO_MASK_V2ÂÂÂ 0x0400
+#define LPAIF_I2SCTL_SPKMONO_SHIFT_V2ÂÂÂ 10
+#define LPAIF_I2SCTL_SPKMONO_STEREO_V2ÂÂÂ (0 << LPAIF_I2SCTL_SPKMONO_SHIFT_V2)
+#define LPAIF_I2SCTL_SPKMONO_MONO_V2ÂÂÂ (1 << LPAIF_I2SCTL_SPKMONO_SHIFT_V2)
+
Â #define LPAIF_I2SCTL_MICEN_MASKÂÂÂÂÂÂÂ GENMASK(8, 8)
Â #define LPAIF_I2SCTL_MICEN_SHIFTÂÂÂ 8
Â #define LPAIF_I2SCTL_MICEN_DISABLEÂÂÂ (0 << LPAIF_I2SCTL_MICEN_SHIFT)
Â #define LPAIF_I2SCTL_MICEN_ENABLEÂÂÂ (1 << LPAIF_I2SCTL_MICEN_SHIFT)
Â +#define LPAIF_I2SCTL_MICEN_MASK_V2ÂÂÂ 0x0200
+#define LPAIF_I2SCTL_MICEN_SHIFT_V2ÂÂÂ 9
+#define LPAIF_I2SCTL_MICEN_DISABLE_V2ÂÂÂ (0 << LPAIF_I2SCTL_MICEN_SHIFT_V2)
+#define LPAIF_I2SCTL_MICEN_ENABLE_V2ÂÂÂ (1 << LPAIF_I2SCTL_MICEN_SHIFT_V2)
+
Â #define LPAIF_I2SCTL_MICMODE_MASKÂÂÂ GENMASK(7, 4)
Â #define LPAIF_I2SCTL_MICMODE_SHIFTÂÂÂ 4
Â #define LPAIF_I2SCTL_MICMODE_NONEÂÂÂ (0 << LPAIF_I2SCTL_MICMODE_SHIFT)
@@ -56,22 +106,61 @@
Â #define LPAIF_I2SCTL_MICMODE_6CHÂÂÂ (7 << LPAIF_I2SCTL_MICMODE_SHIFT)
Â #define LPAIF_I2SCTL_MICMODE_8CHÂÂÂ (8 << LPAIF_I2SCTL_MICMODE_SHIFT)
Â +#define LPAIF_I2SCTL_MICMODE_MASK_V2ÂÂÂ GENMASK(8, 4)
+#define LPAIF_I2SCTL_MICMODE_SHIFT_V2ÂÂÂ 4
+#define LPAIF_I2SCTL_MICMODE_NONE_V2ÂÂÂ (0 << LPAIF_I2SCTL_MICMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_MICMODE_SD0_V2ÂÂÂ (1 << LPAIF_I2SCTL_MICMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_MICMODE_SD1_V2ÂÂÂ (2 << LPAIF_I2SCTL_MICMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_MICMODE_SD2_V2ÂÂÂ (3 << LPAIF_I2SCTL_MICMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_MICMODE_SD3_V2ÂÂÂ (4 << LPAIF_I2SCTL_MICMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_MICMODE_QUAD01_V2ÂÂÂ (5 << LPAIF_I2SCTL_MICMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_MICMODE_QUAD23_V2ÂÂÂ (6 << LPAIF_I2SCTL_MICMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_MICMODE_6CH_V2ÂÂÂ (7 << LPAIF_I2SCTL_MICMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_MICMODE_8CH_V2ÂÂÂ (8 << LPAIF_I2SCTL_MICMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_MICMODE_10CH_V2ÂÂÂ (9 << LPAIF_I2SCTL_MICMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_MICMODE_12CH_V2ÂÂÂ (10 << LPAIF_I2SCTL_MICMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_MICMODE_14CH_V2ÂÂÂ (11 << LPAIF_I2SCTL_MICMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_MICMODE_16CH_V2ÂÂÂ (12 << LPAIF_I2SCTL_MICMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_MICMODE_SD4_V2ÂÂÂ (13 << LPAIF_I2SCTL_MICMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_MICMODE_SD5_V2ÂÂÂ (14 << LPAIF_I2SCTL_MICMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_MICMODE_SD6_V2ÂÂÂ (15 << LPAIF_I2SCTL_MICMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_MICMODE_SD7_V2ÂÂÂ (16 << LPAIF_I2SCTL_MICMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_MICMODE_QUAD45_V2ÂÂÂ (17 << LPAIF_I2SCTL_MICMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_MICMODE_QUAD47_V2ÂÂÂ (18 << LPAIF_I2SCTL_MICMODE_SHIFT_V2)
+#define LPAIF_I2SCTL_MICMODE_8CH_2_V2ÂÂÂ (19 << LPAIF_I2SCTL_MICMODE_SHIFT_V2)
+
Â #define LPAIF_I2SCTL_MIMONO_MASKÂÂÂ GENMASK(3, 3)
Â #define LPAIF_I2SCTL_MICMONO_SHIFTÂÂÂ 3
Â #define LPAIF_I2SCTL_MICMONO_STEREOÂÂÂ (0 << LPAIF_I2SCTL_MICMONO_SHIFT)
Â #define LPAIF_I2SCTL_MICMONO_MONOÂÂÂ (1 << LPAIF_I2SCTL_MICMONO_SHIFT)
Â +#define LPAIF_I2SCTL_MICMONO_MASK_V2ÂÂÂ GENMASK(3, 3)
+#define LPAIF_I2SCTL_MICMONO_SHIFT_V2ÂÂÂ 3
+#define LPAIF_I2SCTL_MICMONO_STEREO_V2ÂÂÂ (0 << LPAIF_I2SCTL_MICMONO_SHIFT_V2)
+#define LPAIF_I2SCTL_MICMONO_MONO_V2ÂÂÂ (1 << LPAIF_I2SCTL_MICMONO_SHIFT_V2)
+
Â #define LPAIF_I2SCTL_WSSRC_MASKÂÂÂÂÂÂÂ 0x0004
Â #define LPAIF_I2SCTL_WSSRC_SHIFTÂÂÂ 2
Â #define LPAIF_I2SCTL_WSSRC_INTERNALÂÂÂ (0 << LPAIF_I2SCTL_WSSRC_SHIFT)
Â #define LPAIF_I2SCTL_WSSRC_EXTERNALÂÂÂ (1 << LPAIF_I2SCTL_WSSRC_SHIFT)
Â +#define LPAIF_I2SCTL_WSSRC_MASK_V2ÂÂÂ 0x0004
+#define LPAIF_I2SCTL_WSSRC_SHIFT_V2ÂÂÂ 2
+#define LPAIF_I2SCTL_WSSRC_INTERNAL_V2ÂÂÂ (0 << LPAIF_I2SCTL_WSSRC_SHIFT_V2)
+#define LPAIF_I2SCTL_WSSRC_EXTERNAL_V2ÂÂÂ (1 << LPAIF_I2SCTL_WSSRC_SHIFT_V2)
+
Â #define LPAIF_I2SCTL_BITWIDTH_MASKÂÂÂ 0x0003
Â #define LPAIF_I2SCTL_BITWIDTH_SHIFTÂÂÂ 0
Â #define LPAIF_I2SCTL_BITWIDTH_16ÂÂÂ (0 << LPAIF_I2SCTL_BITWIDTH_SHIFT)
Â #define LPAIF_I2SCTL_BITWIDTH_24ÂÂÂ (1 << LPAIF_I2SCTL_BITWIDTH_SHIFT)
Â #define LPAIF_I2SCTL_BITWIDTH_32ÂÂÂ (2 << LPAIF_I2SCTL_BITWIDTH_SHIFT)
Â +#define LPAIF_I2SCTL_BITWIDTH_MASK_V2ÂÂÂ 0x0003
+#define LPAIF_I2SCTL_BITWIDTH_SHIFT_V2ÂÂÂ 0
+#define LPAIF_I2SCTL_BITWIDTH_16_V2ÂÂÂ (0 << LPAIF_I2SCTL_BITWIDTH_SHIFT_V2)
+#define LPAIF_I2SCTL_BITWIDTH_24_V2ÂÂÂ (1 << LPAIF_I2SCTL_BITWIDTH_SHIFT_V2)
+#define LPAIF_I2SCTL_BITWIDTH_32_V2ÂÂÂ (2 << LPAIF_I2SCTL_BITWIDTH_SHIFT_V2)
+
Â /* LPAIF IRQ */
Â #define LPAIF_IRQ_REG_ADDR(v, addr, port) \
ÂÂÂÂÂ (v->irq_reg_base + (addr) + v->irq_reg_stride * (port))
@@ -91,7 +180,6 @@
Â #define LPAIF_IRQ_ALL(chan)ÂÂÂÂÂÂÂ (7 << (LPAIF_IRQ_BITSTRIDE * (chan)))
Â Â /* LPAIF DMA */
-
Â #define LPAIF_RDMA_REG_ADDR(v, addr, chan) \
ÂÂÂÂÂ (v->rdma_reg_base + (addr) + v->rdma_reg_stride * (chan))
Â @@ -143,7 +231,7 @@
Â Â #define LPAIF_DMACTL_AUDINTF_MASKÂÂÂ 0x0F0
Â #define LPAIF_DMACTL_AUDINTF_SHIFTÂÂÂ 4
-#define LPAIF_DMACTL_AUDINTF(id)ÂÂÂ (id << LPAIF_DMACTL_AUDINTF_SHIFT)
+#define LPAIF_DMACTL_AUDINTF(port)ÂÂÂ (port << LPAIF_DMACTL_AUDINTF_SHIFT)
Â Â #define LPAIF_DMACTL_FIFOWM_MASKÂÂÂ 0x00E
Â #define LPAIF_DMACTL_FIFOWM_SHIFTÂÂÂ 1
@@ -158,11 +246,99 @@
Â Â #define LPAIF_DMACTL_ENABLE_MASKÂÂÂ 0x1
Â #define LPAIF_DMACTL_ENABLE_SHIFTÂÂÂ 0
-#define LPAIF_DMACTL_ENABLE_OFFÂÂÂ (0 << LPAIF_DMACTL_ENABLE_SHIFT)
+#define LPAIF_DMACTL_ENABLE_OFFÂÂÂÂÂÂÂ (0 << LPAIF_DMACTL_ENABLE_SHIFT)
Â #define LPAIF_DMACTL_ENABLE_ONÂÂÂÂÂÂÂ (1 << LPAIF_DMACTL_ENABLE_SHIFT)
Â +#define LPAIF_IRQ_BITSTRIDEÂÂÂÂÂÂÂ 3
+
+#define LPAIF_IRQ_PER(chan)ÂÂÂÂÂÂÂ (1 << (LPAIF_IRQ_BITSTRIDE * (chan)))
+#define LPAIF_IRQ_XRUN(chan)ÂÂÂÂÂÂÂ (2 << (LPAIF_IRQ_BITSTRIDE * (chan)))
+#define LPAIF_IRQ_ERR(chan)ÂÂÂÂÂÂÂ (4 << (LPAIF_IRQ_BITSTRIDE * (chan)))
+
+#define LPAIF_IRQ_ALL(chan)ÂÂÂÂÂÂÂ (7 << (LPAIF_IRQ_BITSTRIDE * (chan)))
+
Â #define LPAIF_DMACTL_DYNCLK_MASKÂÂÂ BIT(12)
Â #define LPAIF_DMACTL_DYNCLK_SHIFTÂÂÂ 12
Â #define LPAIF_DMACTL_DYNCLK_OFFÂÂÂ (0 << LPAIF_DMACTL_DYNCLK_SHIFT)
Â #define LPAIF_DMACTL_DYNCLK_ONÂÂÂÂÂÂÂ (1 << LPAIF_DMACTL_DYNCLK_SHIFT)
+
+#define LPAIF_DMACTL_BURSTEN_MASK_V2ÂÂÂ 0x100000
+#define LPAIF_DMACTL_BURSTEN_SHIFT_V2ÂÂÂ 20
+#define LPAIF_DMACTL_BURSTEN_SINGLE_V2ÂÂÂ (0 << LPAIF_DMACTL_BURSTEN_SHIFT_V2)
+#define LPAIF_DMACTL_BURSTEN_INCR4_V2ÂÂÂ (1 << LPAIF_DMACTL_BURSTEN_SHIFT_V2)
+
+#define LPAIF_DMACTL_WPSCNT_MASK_V2ÂÂÂ 0xF0000
+#define LPAIF_DMACTL_WPSCNT_SHIFT_V2ÂÂÂ 16
+#define LPAIF_DMACTL_WPSCNT_ONE_V2ÂÂÂ (0 << LPAIF_DMACTL_WPSCNT_SHIFT_V2)
+#define LPAIF_DMACTL_WPSCNT_TWO_V2ÂÂÂ (1 << LPAIF_DMACTL_WPSCNT_SHIFT_V2)
+#define LPAIF_DMACTL_WPSCNT_THREE_V2ÂÂÂ (2 << LPAIF_DMACTL_WPSCNT_SHIFT_V2)
+#define LPAIF_DMACTL_WPSCNT_FOUR_V2ÂÂÂ (3 << LPAIF_DMACTL_WPSCNT_SHIFT_V2)
+#define LPAIF_DMACTL_WPSCNT_SIX_V2ÂÂÂ (5 << LPAIF_DMACTL_WPSCNT_SHIFT_V2)
+#define LPAIF_DMACTL_WPSCNT_EIGHT_V2ÂÂÂ (7 << LPAIF_DMACTL_WPSCNT_SHIFT_V2)
+#define LPAIF_DMACTL_WPSCNT_TEN_V2ÂÂÂ (9 << LPAIF_DMACTL_WPSCNT_SHIFT_V2)
+#define LPAIF_DMACTL_WPSCNT_TWELVE_V2ÂÂÂ (11 << LPAIF_DMACTL_WPSCNT_SHIFT_V2)
+#define LPAIF_DMACTL_WPSCNT_FOURTEEN_V2ÂÂÂ (13 << LPAIF_DMACTL_WPSCNT_SHIFT_V2)
+#define LPAIF_DMACTL_WPSCNT_SIXTEEN_V2ÂÂÂ (15 << LPAIF_DMACTL_WPSCNT_SHIFT_V2)
+
+#define LPAIF_DMACTL_AUDINTF_MASK_V2ÂÂÂ 0xF000
+#define LPAIF_DMACTL_AUDINTF_SHIFT_V2ÂÂÂ 12
+#define LPAIF_DMACTL_AUDINTF_V2(port)ÂÂÂ (port << LPAIF_DMACTL_AUDINTF_SHIFT_V2)
+
+#define LPAIF_DMACTL_AUD_INTF(v, port)Â \
+ÂÂÂ ((v->id ==Â LPASS_VARIANT_V2) ? \
+ÂÂÂÂÂÂÂ LPAIF_DMACTL_AUDINTF_V2(port) : \
+ÂÂÂÂÂÂÂ LPAIF_DMACTL_AUDINTF(port))
+
+#define LPAIF_DMACTL_FIFOWM_MASK_V2ÂÂÂ 0x3E
+#define LPAIF_DMACTL_FIFOWM_SHIFT_V2ÂÂÂ 1
+#define LPAIF_DMACTL_FIFOWM_1_V2ÂÂÂ (0 << LPAIF_DMACTL_FIFOWM_SHIFT_V2)
+#define LPAIF_DMACTL_FIFOWM_2_V2ÂÂÂ (1 << LPAIF_DMACTL_FIFOWM_SHIFT_V2)
+#define LPAIF_DMACTL_FIFOWM_3_V2ÂÂÂ (2 << LPAIF_DMACTL_FIFOWM_SHIFT_V2)
+#define LPAIF_DMACTL_FIFOWM_4_V2ÂÂÂ (3 << LPAIF_DMACTL_FIFOWM_SHIFT_V2)
+#define LPAIF_DMACTL_FIFOWM_5_V2ÂÂÂ (4 << LPAIF_DMACTL_FIFOWM_SHIFT_V2)
+#define LPAIF_DMACTL_FIFOWM_6_V2ÂÂÂ (5 << LPAIF_DMACTL_FIFOWM_SHIFT_V2)
+#define LPAIF_DMACTL_FIFOWM_7_V2ÂÂÂ (6 << LPAIF_DMACTL_FIFOWM_SHIFT_V2)
+#define LPAIF_DMACTL_FIFOWM_8_V2ÂÂÂ (7 << LPAIF_DMACTL_FIFOWM_SHIFT_V2)
+#define LPAIF_DMACTL_FIFOWM_9_V2ÂÂÂ (8 << LPAIF_DMACTL_FIFOWM_SHIFT_V2)
+#define LPAIF_DMACTL_FIFOWM_10_V2ÂÂÂ (9 << LPAIF_DMACTL_FIFOWM_SHIFT_V2)
+#define LPAIF_DMACTL_FIFOWM_11_V2ÂÂÂ (10 << LPAIF_DMACTL_FIFOWM_SHIFT_V2)
+#define LPAIF_DMACTL_FIFOWM_12_V2ÂÂÂ (11 << LPAIF_DMACTL_FIFOWM_SHIFT_V2)
+#define LPAIF_DMACTL_FIFOWM_13_V2ÂÂÂ (12 << LPAIF_DMACTL_FIFOWM_SHIFT_V2)
+#define LPAIF_DMACTL_FIFOWM_14_V2ÂÂÂ (13 << LPAIF_DMACTL_FIFOWM_SHIFT_V2)
+#define LPAIF_DMACTL_FIFOWM_15_V2ÂÂÂ (14 << LPAIF_DMACTL_FIFOWM_SHIFT_V2)
+#define LPAIF_DMACTL_FIFOWM_16_V2ÂÂÂ (15 << LPAIF_DMACTL_FIFOWM_SHIFT_V2)
+#define LPAIF_DMACTL_FIFOWM_17_V2ÂÂÂ (16 << LPAIF_DMACTL_FIFOWM_SHIFT_V2)
+#define LPAIF_DMACTL_FIFOWM_18_V2ÂÂÂ (17 << LPAIF_DMACTL_FIFOWM_SHIFT_V2)
+#define LPAIF_DMACTL_FIFOWM_19_V2ÂÂÂ (18 << LPAIF_DMACTL_FIFOWM_SHIFT_V2)
+#define LPAIF_DMACTL_FIFOWM_20_V2ÂÂÂ (19 << LPAIF_DMACTL_FIFOWM_SHIFT_V2)
+#define LPAIF_DMACTL_FIFOWM_21_V2ÂÂÂ (20 << LPAIF_DMACTL_FIFOWM_SHIFT_V2)
+#define LPAIF_DMACTL_FIFOWM_22_V2ÂÂÂ (21 << LPAIF_DMACTL_FIFOWM_SHIFT_V2)
+#define LPAIF_DMACTL_FIFOWM_23_V2ÂÂÂ (22 << LPAIF_DMACTL_FIFOWM_SHIFT_V2)
+#define LPAIF_DMACTL_FIFOWM_24_V2ÂÂÂ (23 << LPAIF_DMACTL_FIFOWM_SHIFT_V2)
+#define LPAIF_DMACTL_FIFOWM_25_V2ÂÂÂ (24 << LPAIF_DMACTL_FIFOWM_SHIFT_V2)
+#define LPAIF_DMACTL_FIFOWM_26_V2ÂÂÂ (25 << LPAIF_DMACTL_FIFOWM_SHIFT_V2)
+#define LPAIF_DMACTL_FIFOWM_27_V2ÂÂÂ (26 << LPAIF_DMACTL_FIFOWM_SHIFT_V2)
+#define LPAIF_DMACTL_FIFOWM_28_V2ÂÂÂ (27 << LPAIF_DMACTL_FIFOWM_SHIFT_V2)
+#define LPAIF_DMACTL_FIFOWM_29_V2ÂÂÂ (28 << LPAIF_DMACTL_FIFOWM_SHIFT_V2)
+#define LPAIF_DMACTL_FIFOWM_30_V2ÂÂÂ (29 << LPAIF_DMACTL_FIFOWM_SHIFT_V2)
+#define LPAIF_DMACTL_FIFOWM_31_V2ÂÂÂ (30 << LPAIF_DMACTL_FIFOWM_SHIFT_V2)
+#define LPAIF_DMACTL_FIFOWM_32_V2ÂÂÂ (31 << LPAIF_DMACTL_FIFOWM_SHIFT_V2)
+
+#define LPAIF_DMACTL_ENABLE_MASK_V2ÂÂÂ 0x1
+#define LPAIF_DMACTL_ENABLE_SHIFT_V2ÂÂÂ 0
+#define LPAIF_DMACTL_ENABLE_OFF_V2ÂÂÂ (0 << LPAIF_DMACTL_ENABLE_SHIFT_V2)
+#define LPAIF_DMACTL_ENABLE_ON_V2ÂÂÂ (1 << LPAIF_DMACTL_ENABLE_SHIFT_V2)
+
+#define LPAIF_DMACTL_DYNCLK_MASK_V2ÂÂÂ BIT(21)
+#define LPAIF_DMACTL_DYNCLK_SHIFT_V2ÂÂÂ 21
+#define LPAIF_DMACTL_DYNCLK_OFF_V2ÂÂÂ (0 << LPAIF_DMACTL_DYNCLK_SHIFT_V2)
+#define LPAIF_DMACTL_DYNCLK_ON_V2ÂÂÂ (1 << LPAIF_DMACTL_DYNCLK_SHIFT_V2)
+
+#define __LPAIF_DMA_CTL(v, bit)Â \
+ÂÂÂ ((v->id ==Â LPASS_VARIANT_V2) ? \
+ÂÂÂÂÂÂÂ LPAIF_DMACTL_##bit##_V2 : \
+ÂÂÂÂÂÂÂ LPAIF_DMACTL_##bit)
+
+#define LPAIF_DMACTL(v, bit)ÂÂÂÂÂÂÂ __LPAIF_DMA_CTL(v, bit)
+
Â #endif /* __LPASS_LPAIF_REG_H__ */
diff --git a/sound/soc/qcom/lpass-platform.c b/sound/soc/qcom/lpass-platform.c
index b05091c2..821599e 100644
--- a/sound/soc/qcom/lpass-platform.c
+++ b/sound/soc/qcom/lpass-platform.c
@@ -146,25 +146,26 @@ static int lpass_platform_pcmops_hw_params(struct snd_soc_component *component,
ÂÂÂÂÂÂÂÂÂ return bitwidth;
ÂÂÂÂÂ }
Â -ÂÂÂ regval = LPAIF_DMACTL_BURSTEN_INCR4 |
-ÂÂÂÂÂÂÂÂÂÂÂ LPAIF_DMACTL_AUDINTF(dma_port) |
-ÂÂÂÂÂÂÂÂÂÂÂ LPAIF_DMACTL_FIFOWM_8;
+
+ÂÂÂ regval = LPAIF_DMACTL(v, BURSTEN_INCR4);
+ÂÂÂ regval |= LPAIF_DMACTL(v, FIFOWM_8);
+ÂÂÂ regval |= LPAIF_DMACTL_AUD_INTF(v, dma_port);
Â ÂÂÂÂÂ switch (bitwidth) {
ÂÂÂÂÂ case 16:
ÂÂÂÂÂÂÂÂÂ switch (channels) {
ÂÂÂÂÂÂÂÂÂ case 1:
ÂÂÂÂÂÂÂÂÂ case 2:
-ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_DMACTL_WPSCNT_ONE;
+ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_DMACTL(v, WPSCNT_ONE);
ÂÂÂÂÂÂÂÂÂÂÂÂÂ break;
ÂÂÂÂÂÂÂÂÂ case 4:
-ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_DMACTL_WPSCNT_TWO;
+ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_DMACTL(v, WPSCNT_TWO);
ÂÂÂÂÂÂÂÂÂÂÂÂÂ break;
ÂÂÂÂÂÂÂÂÂ case 6:
-ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_DMACTL_WPSCNT_THREE;
+ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_DMACTL(v, WPSCNT_THREE);
ÂÂÂÂÂÂÂÂÂÂÂÂÂ break;
ÂÂÂÂÂÂÂÂÂ case 8:
-ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_DMACTL_WPSCNT_FOUR;
+ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_DMACTL(v, WPSCNT_FOUR);
ÂÂÂÂÂÂÂÂÂÂÂÂÂ break;
ÂÂÂÂÂÂÂÂÂ default:
ÂÂÂÂÂÂÂÂÂÂÂÂÂ dev_err(soc_runtime->dev,
@@ -177,19 +178,19 @@ static int lpass_platform_pcmops_hw_params(struct snd_soc_component *component,
ÂÂÂÂÂ case 32:
ÂÂÂÂÂÂÂÂÂ switch (channels) {
ÂÂÂÂÂÂÂÂÂ case 1:
-ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_DMACTL_WPSCNT_ONE;
+ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_DMACTL(v, WPSCNT_ONE);
ÂÂÂÂÂÂÂÂÂÂÂÂÂ break;
ÂÂÂÂÂÂÂÂÂ case 2:
-ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_DMACTL_WPSCNT_TWO;
+ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_DMACTL(v, WPSCNT_TWO);
ÂÂÂÂÂÂÂÂÂÂÂÂÂ break;
ÂÂÂÂÂÂÂÂÂ case 4:
-ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_DMACTL_WPSCNT_FOUR;
+ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_DMACTL(v, WPSCNT_FOUR);
ÂÂÂÂÂÂÂÂÂÂÂÂÂ break;
ÂÂÂÂÂÂÂÂÂ case 6:
-ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_DMACTL_WPSCNT_SIX;
+ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_DMACTL(v, WPSCNT_SIX);
ÂÂÂÂÂÂÂÂÂÂÂÂÂ break;
ÂÂÂÂÂÂÂÂÂ case 8:
-ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_DMACTL_WPSCNT_EIGHT;
+ÂÂÂÂÂÂÂÂÂÂÂ regval |= LPAIF_DMACTL(v, WPSCNT_EIGHT);
ÂÂÂÂÂÂÂÂÂÂÂÂÂ break;
ÂÂÂÂÂÂÂÂÂ default:
ÂÂÂÂÂÂÂÂÂÂÂÂÂ dev_err(soc_runtime->dev,
@@ -277,7 +278,7 @@ static int lpass_platform_pcmops_prepare(struct snd_soc_component *component,
Â ÂÂÂÂÂ ret = regmap_update_bits(drvdata->lpaif_map,
ÂÂÂÂÂÂÂÂÂÂÂÂÂ LPAIF_DMACTL_REG(v, ch, dir),
-ÂÂÂÂÂÂÂÂÂÂÂ LPAIF_DMACTL_ENABLE_MASK, LPAIF_DMACTL_ENABLE_ON);
+ÂÂÂÂÂÂÂÂÂÂÂ LPAIF_DMACTL(v, ENABLE_MASK), LPAIF_DMACTL_ENABLE_ON);
ÂÂÂÂÂ if (ret) {
ÂÂÂÂÂÂÂÂÂ dev_err(soc_runtime->dev, "error writing to rdmactl reg: %d\n",
ÂÂÂÂÂÂÂÂÂÂÂÂÂ ret);
@@ -326,7 +327,7 @@ static int lpass_platform_pcmops_trigger(struct snd_soc_component *component,
Â ÂÂÂÂÂÂÂÂÂ ret = regmap_update_bits(drvdata->lpaif_map,
ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ LPAIF_DMACTL_REG(v, ch, dir),
-ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ LPAIF_DMACTL_ENABLE_MASK,
+ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ LPAIF_DMACTL(v, ENABLE_MASK),
ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ LPAIF_DMACTL_ENABLE_ON);
ÂÂÂÂÂÂÂÂÂ if (ret) {
ÂÂÂÂÂÂÂÂÂÂÂÂÂ dev_err(soc_runtime->dev,
@@ -339,7 +340,7 @@ static int lpass_platform_pcmops_trigger(struct snd_soc_component *component,
ÂÂÂÂÂ case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
ÂÂÂÂÂÂÂÂÂ ret = regmap_update_bits(drvdata->lpaif_map,
ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ LPAIF_DMACTL_REG(v, ch, dir),
-ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ LPAIF_DMACTL_ENABLE_MASK,
+ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ LPAIF_DMACTL(v, ENABLE_MASK),
ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ LPAIF_DMACTL_ENABLE_OFF);
ÂÂÂÂÂÂÂÂÂ if (ret) {
ÂÂÂÂÂÂÂÂÂÂÂÂÂ dev_err(soc_runtime->dev,
diff --git a/sound/soc/qcom/lpass.h b/sound/soc/qcom/lpass.h
index 279cd02..384f4b8 100644
--- a/sound/soc/qcom/lpass.h
+++ b/sound/soc/qcom/lpass.h
@@ -17,6 +17,9 @@
Â #define LPASS_MAX_MI2S_PORTSÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ (8)
Â #define LPASS_MAX_DMA_CHANNELSÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ (8)
Â +#define LPASS_VARIANTÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ 0
+#define LPASS_VARIANT_V2ÂÂÂÂÂÂÂÂÂÂÂ 1
+
Â struct lpass_dai {
ÂÂÂÂÂ struct clk *osr_clk;
ÂÂÂÂÂ struct clk *bit_clk;
@@ -91,6 +94,9 @@ struct lpass_variant {
ÂÂÂÂÂ /* SOC specific clocks configuration */
ÂÂÂÂÂ const char **clk_name;
ÂÂÂÂÂ int num_clks;
+
+ÂÂÂ /* LPASS Version id */
+ÂÂÂ int id;

May be spelling this out like "version_id" would make it more readable.

thanks,
srini

Â };
Â Â /* register the platform driver from the CPU DAI driver */

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