Re: [PATCH V2] cpufreq: imx-cpufreq-dt: support i.MX7ULP

[Viresh Kumar]

On 28-04-20, 15:21, peng.fan@xxxxxxx wrote:
> From: Peng Fan <peng.fan@xxxxxxx>
> 
> i.MX7ULP's ARM core clock design is totally different compared
> with i.MX7D/8M SoCs which supported by imx-cpufreq-dt. It needs
> get_intermediate and target_intermedate to configure clk MUX ready,
> before let OPP configure ARM core clk.
>                                           |---FIRC
>      |------RUN---...---SCS(MUX2) --------|
> ARM --(MUX1)                              |---SPLL_PFD0(CLK_SET_RATE_GATE)
>      |------HSRUN--...--HSRUN_SCS(MUX3)---|
>                                           |---SRIC
> 
> FIRC is step clk, SPLL_PFD0 is the normal clk driving ARM core.
> MUX2 and MUX3 share same inputs. So if MUX2/MUX3 both sources from
> SPLL_PFD0, both MUXes will lose input when configure SPLL_PFD0.
> So the target_intermediate will configure MUX2/MUX3 to FIRC, to avoid
> ARM core lose clk when configure SPLL_PFD0.
> 
> Signed-off-by: Peng Fan <peng.fan@xxxxxxx>
> ---
> 
> V2:
>  Fix boot break. Tested on i.MX8MN DDR4 EVK.

Applied. Thanks.

-- 
viresh