Re: [PATCH 5/5] PCI: brcmstb: disable L0s component of ASPM by default

[Florian Fainelli]

On 4/30/20 11:55 AM, Jim Quinlan wrote:
> From: Jim Quinlan <jquinlan@xxxxxxxxxxxx>
> 
> Some informal internal experiments has shown that the BrcmSTB ASPM L0s
> savings may introduce an undesirable noise signal on some customers'
> boards.  In addition, L0s was found lacking in realized power savings,
> especially relative to the L1 ASPM component.  This is BrcmSTB's
> experience and may not hold for others.  At any rate, we disable L0s
> savings by default unless the DT node has the 'brcm,aspm-en-l0s'
> property.
> 
> Signed-off-by: Jim Quinlan <jquinlan@xxxxxxxxxxxx>

Acked-by: Florian Fainelli <f.fainelli@xxxxxxxxx>
-- 
Florian