[tip: x86/cpu] x86/cpu/amd: Make erratum #1054 a legacy erratum

From: tip-bot2 for Kim Phillips
Date: Wed May 06 2020 - 13:27:59 EST


The following commit has been merged into the x86/cpu branch of tip:

Commit-ID: 3e2c1fd2022ccce96b6a05a6ab519d65769ee320
Gitweb: https://git.kernel.org/tip/3e2c1fd2022ccce96b6a05a6ab519d65769ee320
Author: Kim Phillips <kim.phillips@xxxxxxx>
AuthorDate: Fri, 17 Apr 2020 09:33:56 -05:00
Committer: Borislav Petkov <bp@xxxxxxx>
CommitterDate: Wed, 06 May 2020 19:18:24 +02:00

x86/cpu/amd: Make erratum #1054 a legacy erratum

Commit

21b5ee59ef18 ("x86/cpu/amd: Enable the fixed Instructions Retired
counter IRPERF")

mistakenly added erratum #1054 as an OS Visible Workaround (OSVW) ID 0.
Erratum #1054 is not OSVW ID 0 [1], so make it a legacy erratum.

There would never have been a false positive on older hardware that
has OSVW bit 0 set, since the IRPERF feature was not available.

However, save a couple of RDMSR executions per thread, on modern
system configurations that correctly set non-zero values in their
OSVW_ID_Length MSRs.

[1] Revision Guide for AMD Family 17h Models 00h-0Fh Processors. The
revision guide is available from the bugzilla link below.

Fixes: 21b5ee59ef18 ("x86/cpu/amd: Enable the fixed Instructions Retired counter IRPERF")
Reported-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
Signed-off-by: Kim Phillips <kim.phillips@xxxxxxx>
Signed-off-by: Borislav Petkov <bp@xxxxxxx>
Link: https://lkml.kernel.org/r/20200417143356.26054-1-kim.phillips@xxxxxxx
Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537
---
arch/x86/kernel/cpu/amd.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 547ad7b..6437381 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -1142,7 +1142,7 @@ static const int amd_erratum_383[] =

/* #1054: Instructions Retired Performance Counter May Be Inaccurate */
static const int amd_erratum_1054[] =
- AMD_OSVW_ERRATUM(0, AMD_MODEL_RANGE(0x17, 0, 0, 0x2f, 0xf));
+ AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0, 0, 0x2f, 0xf));


static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum)