arch/powerpc/kernel/head_40x.S:348: Error: attempt to move .org backwards

From: kbuild test robot
Date: Thu May 07 2020 - 10:33:28 EST

Hi Christophe,

First bad commit (maybe != root cause):

tree: .config.gz< Description: application/gzip Sasha Levin: "[PATCH AUTOSEL 4.19 13/20] RDMA/core: Fix race between destroy and release FD object" Sasha Levin: "[PATCH AUTOSEL 4.19 14/20] cpufreq: intel_pstate: Only mention the BIOS disabling turbo mode once" date ] [ thread ] [ subject ] [ author ] cm/linux/kernel/git/torvalds/linux.git">https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
Warn and return ENOSYS on syscalls from kernel
as .config)
ontent.com/intel/lkp-tests/master/sbin/make.cross">https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross

make.cross ARCH=powerpc64

register expression
attempt to move .org backwards
2005-09-26 200
2005-09-26 201 /* First, check if it was a zone fault (which means a user
2005-09-26 202 * tried to access a kernel or read-protected page - always
2005-09-26 203 * a SEGV). All other faults here must be stores, so no
2005-09-26 204 * need to check ESR_DST as well. */
2005-09-26 205 mfspr r10, SPRN_ESR
2005-09-26 206 andis. r10, r10, ESR_DIZ@h
2005-09-26 207 bne 2f
2005-09-26 208
2005-09-26 209 mfspr r10, SPRN_DEAR /* Get faulting address */
2005-09-26 210
2005-09-26 211 /* If we are faulting a kernel address, we have to use the
2005-09-26 212 * kernel page tables.
2005-09-26 213 */
2007-10-11 214 lis r11, PAGE_OFFSET@h
2005-09-26 215 cmplw r10, r11
2005-09-26 216 blt+ 3f
2005-09-26 217 lis r11, swapper_pg_dir@h
2005-09-26 218 ori r11, r11, swapper_pg_dir@l
2005-09-26 219 li r9, 0
2005-09-26 220 mtspr SPRN_PID, r9 /* TLB will have 0 TID */
2005-09-26 221 b 4f
2005-09-26 222
2005-09-26 223 /* Get the PGD for the current thread.
2005-09-26 224 */
2005-09-26 225 3:
Herrenschmidt 2009-07-14 226 mfspr r11,SPRN_SPRG_THREAD
2005-09-26 227 lwz r11,PGDIR(r11)
2005-09-26 228 4:
2005-09-26 229 tophys(r11, r11)
2005-09-26 230 rlwimi r11, r10, 12, 20, 29 /* Create L1 (pgdir/pmd) address */
2005-09-26 231 lwz r11, 0(r11) /* Get L1 entry */
2005-09-26 232 rlwinm. r12, r11, 0, 0, 19 /* Extract L2 (pte) base address */
2005-09-26 233 beq 2f /* Bail if no table */
2005-09-26 234
2005-09-26 235 rlwimi r12, r10, 22, 20, 29 /* Compute PTE address */
2005-09-26 236 lwz r11, 0(r12) /* Get Linux PTE */
2005-09-26 237
2005-09-26 238 andi. r9, r11, _PAGE_RW /* Is it writeable? */
2005-09-26 239 beq 2f /* Bail if not */
2005-09-26 240
2005-09-26 241 /* Update 'changed'.
2005-09-26 242 */
2005-09-26 243 ori r11, r11, _PAGE_DIRTY|_PAGE_ACCESSED|_PAGE_HWWRITE
2005-09-26 244 stw r11, 0(r12) /* Update Linux page table */
2005-09-26 245
2005-09-26 246 /* Most of the Linux PTE is ready to load into the TLB LO.
2005-09-26 247 * We set ZSEL, where only the LS-bit determines user access.
2005-09-26 248 * We set execute, because we don't have the granularity to
2005-09-26 249 * properly set this at the page level (Linux problem).
2005-09-26 250 * If shared is set, we cause a zero PID->TID load.
2005-09-26 251 * Many of these bits are software only. Bits we don't set
2005-09-26 252 * here we (properly should) assume have the appropriate value.
2005-09-26 253 */
2005-09-26 254 li r12, 0x0ce2
2005-09-26 255 andc r11, r11, r12 /* Make sure 20, 21 are zero */
2005-09-26 256
2005-09-26 257 /* find the TLB index that caused the fault. It has to be here.
2005-09-26 258 */
2005-09-26 259 tlbsx r9, 0, r10
2005-09-26 260
2005-09-26 261 tlbwe r11, r9, TLB_DATA /* Load TLB LO */
2005-09-26 262
2005-09-26 263 /* Done...restore registers and get out of here.
2005-09-26 264 */
2005-09-26 265 #ifdef CONFIG_403GCX
2005-09-26 266 lwz r12, 12(r0)
2005-09-26 267 lwz r11, 8(r0)
2005-09-26 268 mtspr SPRN_PID, r12
2005-09-26 269 mtcr r11
2005-09-26 270 lwz r9, 4(r0)
2005-09-26 271 lwz r12, 0(r0)
2005-09-26 272 #else
Herrenschmidt 2009-07-14 273 mfspr r12, SPRN_SPRG_SCRATCH5
Herrenschmidt 2009-07-14 274 mfspr r11, SPRN_SPRG_SCRATCH6
2005-09-26 275 mtspr SPRN_PID, r12
2005-09-26 276 mtcr r11
Herrenschmidt 2009-07-14 277 mfspr r9, SPRN_SPRG_SCRATCH4
Herrenschmidt 2009-07-14 278 mfspr r12, SPRN_SPRG_SCRATCH3
2005-09-26 279 #endif
Herrenschmidt 2009-07-14 280 mfspr r11, SPRN_SPRG_SCRATCH1
Herrenschmidt 2009-07-14 281 mfspr r10, SPRN_SPRG_SCRATCH0
2005-09-26 282 PPC405_ERR77_SYNC
2005-09-26 283 rfi /* Should sync shadow TLBs */
2005-09-26 284 b . /* prevent prefetch past rfi */
2005-09-26 285
2005-09-26 286 2:
2005-09-26 287 /* The bailout. Restore registers to pre-exception conditions
2005-09-26 288 * and call the heavyweights to help us out.
2005-09-26 289 */
2005-09-26 290 #ifdef CONFIG_403GCX
2005-09-26 291 lwz r12, 12(r0)
2005-09-26 292 lwz r11, 8(r0)
2005-09-26 293 mtspr SPRN_PID, r12
2005-09-26 294 mtcr r11
2005-09-26 295 lwz r9, 4(r0)
2005-09-26 296 lwz r12, 0(r0)
2005-09-26 297 #else
Herrenschmidt 2009-07-14 298 mfspr r12, SPRN_SPRG_SCRATCH5
Herrenschmidt 2009-07-14 299 mfspr r11, SPRN_SPRG_SCRATCH6
2005-09-26 300 mtspr SPRN_PID, r12
2005-09-26 301 mtcr r11
Herrenschmidt 2009-07-14 302 mfspr r9, SPRN_SPRG_SCRATCH4
Herrenschmidt 2009-07-14 303 mfspr r12, SPRN_SPRG_SCRATCH3
2005-09-26 304 #endif
Herrenschmidt 2009-07-14 305 mfspr r11, SPRN_SPRG_SCRATCH1
Herrenschmidt 2009-07-14 306 mfspr r10, SPRN_SPRG_SCRATCH0
2005-09-26 307 b DataAccess
2005-09-26 308
2005-09-26 309 /*
2005-09-26 310 * 0x0400 - Instruction Storage Exception
2005-09-26 311 * This is caused by a fetch from non-execute or guarded pages.
2005-09-26 312 */
2005-09-26 313 START_EXCEPTION(0x0400, InstructionAccess)
2019-04-30 314 EXCEPTION_PROLOG
2005-09-26 315 mr r4,r12 /* Pass SRR0 as arg2 */
2019-12-21 316 stw r4, _DEAR(r11)
2005-09-26 317 li r5,0 /* Pass zero as arg3 */
Herrenschmidt 2012-03-07 318 EXC_XFER_LITE(0x400, handle_page_fault)
2005-09-26 319
2005-09-26 320 /* 0x0500 - External Interrupt Exception */
2005-09-26 321 EXCEPTION(0x0500, HardwareInterrupt, do_IRQ, EXC_XFER_LITE)
2005-09-26 322
2005-09-26 323 /* 0x0600 - Alignment Exception */
2005-09-26 324 START_EXCEPTION(0x0600, Alignment)
2019-04-30 325 EXCEPTION_PROLOG
2005-09-26 326 mfspr r4,SPRN_DEAR /* Grab the DEAR and save it */
2005-09-26 327 stw r4,_DEAR(r11)
2005-09-26 328 addi r3,r1,STACK_FRAME_OVERHEAD
2019-04-30 329 EXC_XFER_STD(0x600, alignment_exception)
2005-09-26 330
2005-09-26 331 /* 0x0700 - Program Exception */
2005-09-26 332 START_EXCEPTION(0x0700, ProgramCheck)
2019-04-30 333 EXCEPTION_PROLOG
2005-09-26 334 mfspr r4,SPRN_ESR /* Grab the ESR and save it */
2005-09-26 335 stw r4,_ESR(r11)
2005-09-26 336 addi r3,r1,STACK_FRAME_OVERHEAD
2005-10-01 337 EXC_XFER_STD(0x700, program_check_exception)
2005-09-26 338
2019-04-30 339 EXCEPTION(0x0800, Trap_08, unknown_exception, EXC_XFER_STD)
2019-04-30 340 EXCEPTION(0x0900, Trap_09, unknown_exception, EXC_XFER_STD)
2019-04-30 341 EXCEPTION(0x0A00, Trap_0A, unknown_exception, EXC_XFER_STD)
2019-04-30 342 EXCEPTION(0x0B00, Trap_0B, unknown_exception, EXC_XFER_STD)
2005-09-26 343
2005-09-26 344 /* 0x0C00 - System Call Exception */
2005-09-26 345 START_EXCEPTION(0x0C00, SystemCall)
2019-04-30 346 SYSCALL_ENTRY 0xc00
2005-09-26 347
2019-04-30 @348 EXCEPTION(0x0D00, Trap_0D, unknown_exception, EXC_XFER_STD)
2019-04-30 349 EXCEPTION(0x0E00, Trap_0E, unknown_exception, EXC_XFER_STD)
2019-04-30 350 EXCEPTION(0x0F00, Trap_0F, unknown_exception, EXC_XFER_STD)
2005-09-26 351
commit
Enter exceptions with MSR_EE unset
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