[PATCH v3 4/5] clk: lochnagar: Move binding over to dtschema
From: Charles Keepax
Date: Tue May 12 2020 - 11:24:32 EST
Signed-off-by: Charles Keepax <ckeepax@xxxxxxxxxxxxxxxxxxxxx>
---
No changes since v2.
Thanks,
Charles
.../devicetree/bindings/clock/cirrus,lochnagar.txt | 94 ----------------------
.../bindings/clock/cirrus,lochnagar.yaml | 78 ++++++++++++++++++
2 files changed, 78 insertions(+), 94 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/clock/cirrus,lochnagar.txt
create mode 100644 Documentation/devicetree/bindings/clock/cirrus,lochnagar.yaml
diff --git a/Documentation/devicetree/bindings/clock/cirrus,lochnagar.txt b/Documentation/devicetree/bindings/clock/cirrus,lochnagar.txt
deleted file mode 100644
index 52a064c789eec..0000000000000
--- a/Documentation/devicetree/bindings/clock/cirrus,lochnagar.txt
+++ /dev/null
@@ -1,94 +0,0 @@
-Cirrus Logic Lochnagar Audio Development Board
-
-Lochnagar is an evaluation and development board for Cirrus Logic
-Smart CODEC and Amp devices. It allows the connection of most Cirrus
-Logic devices on mini-cards, as well as allowing connection of
-various application processor systems to provide a full evaluation
-platform. Audio system topology, clocking and power can all be
-controlled through the Lochnagar, allowing the device under test
-to be used in a variety of possible use cases.
-
-This binding document describes the binding for the clock portion of
-the driver.
-
-Also see these documents for generic binding information:
- [1] Clock : ../clock/clock-bindings.txt
-
-And these for relevant defines:
- [2] include/dt-bindings/clock/lochnagar.h
-
-This binding must be part of the Lochnagar MFD binding:
- [3] ../mfd/cirrus,lochnagar.txt
-
-Required properties:
-
- - compatible : One of the following strings:
- "cirrus,lochnagar1-clk"
- "cirrus,lochnagar2-clk"
-
- - #clock-cells : Must be 1. The first cell indicates the clock
- number, see [2] for available clocks and [1].
-
-Optional properties:
-
- - clocks : Must contain an entry for each clock in clock-names.
- - clock-names : May contain entries for each of the following
- clocks:
- - ln-cdc-clkout : Output clock from CODEC card.
- - ln-dsp-clkout : Output clock from DSP card.
- - ln-gf-mclk1,ln-gf-mclk2,ln-gf-mclk3,ln-gf-mclk4 : Optional
- input audio clocks from host system.
- - ln-psia1-mclk, ln-psia2-mclk : Optional input audio clocks from
- external connector.
- - ln-spdif-mclk : Optional input audio clock from SPDIF.
- - ln-spdif-clkout : Optional input audio clock from SPDIF.
- - ln-adat-mclk : Optional input audio clock from ADAT.
- - ln-pmic-32k : On board fixed clock.
- - ln-clk-12m : On board fixed clock.
- - ln-clk-11m : On board fixed clock.
- - ln-clk-24m : On board fixed clock.
- - ln-clk-22m : On board fixed clock.
- - ln-clk-8m : On board fixed clock.
- - ln-usb-clk-24m : On board fixed clock.
- - ln-usb-clk-12m : On board fixed clock.
-
- - assigned-clocks : A list of Lochnagar clocks to be reparented, see
- [2] for available clocks.
- - assigned-clock-parents : Parents to be assigned to the clocks
- listed in "assigned-clocks".
-
-Optional nodes:
-
- - fixed-clock nodes may be registered for the following on board clocks:
- - ln-pmic-32k : 32768 Hz
- - ln-clk-12m : 12288000 Hz
- - ln-clk-11m : 11298600 Hz
- - ln-clk-24m : 24576000 Hz
- - ln-clk-22m : 22579200 Hz
- - ln-clk-8m : 8192000 Hz
- - ln-usb-clk-24m : 24576000 Hz
- - ln-usb-clk-12m : 12288000 Hz
-
-Example:
-
-lochnagar {
- lochnagar-clk {
- compatible = "cirrus,lochnagar2-clk";
-
- #clock-cells = <1>;
-
- clocks = <&clk-audio>, <&clk_pmic>;
- clock-names = "ln-gf-mclk2", "ln-pmic-32k";
-
- assigned-clocks = <&lochnagar-clk LOCHNAGAR_CDC_MCLK1>,
- <&lochnagar-clk LOCHNAGAR_CDC_MCLK2>;
- assigned-clock-parents = <&clk-audio>,
- <&clk-pmic>;
- };
-
- clk-pmic: clk-pmic {
- compatible = "fixed-clock";
- clock-cells = <0>;
- clock-frequency = <32768>;
- };
-};
diff --git a/Documentation/devicetree/bindings/clock/cirrus,lochnagar.yaml b/Documentation/devicetree/bindings/clock/cirrus,lochnagar.yaml
new file mode 100644
index 0000000000000..59de125647ecb
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/cirrus,lochnagar.yaml
@@ -0,0 +1,78 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/cirrus,lochnagar.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cirrus Logic Lochnagar Audio Development Board
+
+maintainers:
+ - patches@xxxxxxxxxxxxxxxxxxxxx
+
+description: |
+ Lochnagar is an evaluation and development board for Cirrus Logic
+ Smart CODEC and Amp devices. It allows the connection of most Cirrus
+ Logic devices on mini-cards, as well as allowing connection of various
+ application processor systems to provide a full evaluation platform.
+ Audio system topology, clocking and power can all be controlled through
+ the Lochnagar, allowing the device under test to be used in a variety of
+ possible use cases.
+
+ This binding document describes the binding for the clock portion of the
+ driver.
+
+ Also see these documents for generic binding information:
+ [1] Clock : ../clock/clock-bindings.txt
+
+ And these for relevant defines:
+ [2] include/dt-bindings/clock/lochnagar.h
+
+ This binding must be part of the Lochnagar MFD binding:
+ [3] ../mfd/cirrus,lochnagar.yaml
+
+properties:
+ compatible:
+ enum:
+ - cirrus,lochnagar1-clk
+ - cirrus,lochnagar2-clk
+
+ '#clock-cells':
+ description:
+ The first cell indicates the clock number, see [2] for available
+ clocks and [1].
+ const: 1
+
+ clock-names:
+ items:
+ enum:
+ - ln-cdc-clkout # Output clock from CODEC card.
+ - ln-dsp-clkout # Output clock from DSP card.
+ - ln-gf-mclk1 # Optional input clock from host system.
+ - ln-gf-mclk2 # Optional input clock from host system.
+ - ln-gf-mclk3 # Optional input clock from host system.
+ - ln-gf-mclk4 # Optional input clock from host system.
+ - ln-psia1-mclk # Optional input clock from external connector.
+ - ln-psia2-mclk # Optional input clock from external connector.
+ - ln-spdif-mclk # Optional input clock from SPDIF.
+ - ln-spdif-clkout # Optional input clock from SPDIF.
+ - ln-adat-mclk # Optional input clock from ADAT.
+ - ln-pmic-32k # On board fixed clock.
+ - ln-clk-12m # On board fixed clock.
+ - ln-clk-11m # On board fixed clock.
+ - ln-clk-24m # On board fixed clock.
+ - ln-clk-22m # On board fixed clock.
+ - ln-clk-8m # On board fixed clock.
+ - ln-usb-clk-24m # On board fixed clock.
+ - ln-usb-clk-12m # On board fixed clock.
+ minItems: 1
+ maxItems: 19
+
+ clocks: true
+ assigned-clocks: true
+ assigned-clock-parents: true
+
+additionalProperties: false
+
+required:
+ - compatible
+ - '#clock-cells'
--
2.11.0