Re: [patch V4 part 1 14/36] x86/entry: Get rid of ist_begin/end_non_atomic()

[Mathieu Desnoyers]

----- On May 5, 2020, at 9:16 AM, Thomas Gleixner tglx@xxxxxxxxxxxxx wrote:

> This is completely overengineered and definitely not an interface which
> should be made available to anything else than this particular MCE case.

This patch introduces a significant change under the radar (not explained
in the changelog): it turns preempt_enable_no_resched() into preempt_enable().

Why, and why was it a no_resched() in the first place ? Was it for performance
or correctness reasons ?

Thanks,

Mathieu

> 
> Signed-off-by: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
> ---
> arch/x86/include/asm/traps.h   |    2 --
> arch/x86/kernel/cpu/mce/core.c |    6 ++++--
> arch/x86/kernel/traps.c        |   37 -------------------------------------
> 3 files changed, 4 insertions(+), 41 deletions(-)
> 
> --- a/arch/x86/include/asm/traps.h
> +++ b/arch/x86/include/asm/traps.h
> @@ -120,8 +120,6 @@ asmlinkage void smp_irq_move_cleanup_int
> 
> extern void ist_enter(struct pt_regs *regs);
> extern void ist_exit(struct pt_regs *regs);
> -extern void ist_begin_non_atomic(struct pt_regs *regs);
> -extern void ist_end_non_atomic(void);
> 
> #ifdef CONFIG_VMAP_STACK
> void __noreturn handle_stack_overflow(const char *message,
> --- a/arch/x86/kernel/cpu/mce/core.c
> +++ b/arch/x86/kernel/cpu/mce/core.c
> @@ -1352,13 +1352,15 @@ void notrace do_machine_check(struct pt_
> 
> 	/* Fault was in user mode and we need to take some action */
> 	if ((m.cs & 3) == 3) {
> -		ist_begin_non_atomic(regs);
> +		/* If this triggers there is no way to recover. Die hard. */
> +		BUG_ON(!on_thread_stack() || !user_mode(regs));
> 		local_irq_enable();
> +		preempt_enable();
> 
> 		if (kill_it || do_memory_failure(&m))
> 			force_sig(SIGBUS);
> +		preempt_disable();
> 		local_irq_disable();
> -		ist_end_non_atomic();
> 	} else {
> 		if (!fixup_exception(regs, X86_TRAP_MC, error_code, 0))
> 			mce_panic("Failed kernel mode recovery", &m, msg);
> --- a/arch/x86/kernel/traps.c
> +++ b/arch/x86/kernel/traps.c
> @@ -117,43 +117,6 @@ void ist_exit(struct pt_regs *regs)
> 		rcu_nmi_exit();
> }
> 
> -/**
> - * ist_begin_non_atomic() - begin a non-atomic section in an IST exception
> - * @regs:	regs passed to the IST exception handler
> - *
> - * IST exception handlers normally cannot schedule.  As a special
> - * exception, if the exception interrupted userspace code (i.e.
> - * user_mode(regs) would return true) and the exception was not
> - * a double fault, it can be safe to schedule.  ist_begin_non_atomic()
> - * begins a non-atomic section within an ist_enter()/ist_exit() region.
> - * Callers are responsible for enabling interrupts themselves inside
> - * the non-atomic section, and callers must call ist_end_non_atomic()
> - * before ist_exit().
> - */
> -void ist_begin_non_atomic(struct pt_regs *regs)
> -{
> -	BUG_ON(!user_mode(regs));
> -
> -	/*
> -	 * Sanity check: we need to be on the normal thread stack.  This
> -	 * will catch asm bugs and any attempt to use ist_preempt_enable
> -	 * from double_fault.
> -	 */
> -	BUG_ON(!on_thread_stack());
> -
> -	preempt_enable_no_resched();
> -}
> -
> -/**
> - * ist_end_non_atomic() - begin a non-atomic section in an IST exception
> - *
> - * Ends a non-atomic section started with ist_begin_non_atomic().
> - */
> -void ist_end_non_atomic(void)
> -{
> -	preempt_disable();
> -}
> -
> int is_valid_bugaddr(unsigned long addr)
> {
>  	unsigned short ud;

-- 
Mathieu Desnoyers
EfficiOS Inc.
http://www.efficios.com