Re: [PATCH v2] arm64: dts: ti: k3-am654-main: Update otap-del-sel values

[Faiz Abbas]

Hi Tero,

On 15/05/20 3:44 pm, Tero Kristo wrote:
> On 07/05/2020 21:15, Faiz Abbas wrote:
>> According to the latest AM65x Data Manual[1], a different output tap
>> delay value is optimum for a given speed mode. Update these values.
>>
>> [1] http://www.ti.com/lit/gpn/am6526
>>
>> Signed-off-by: Faiz Abbas <faiz_abbas@xxxxxx>
>> ---
>> v2: Rebased to the latest mainline kernel
>>
>> Â arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 12 +++++++++++-
>> Â 1 file changed, 11 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
>> index 11887c72f23a..6cd9701e4ead 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
>> @@ -244,7 +244,17 @@
>> ÂÂÂÂÂÂÂÂÂ interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
>> ÂÂÂÂÂÂÂÂÂ mmc-ddr-1_8v;
>> ÂÂÂÂÂÂÂÂÂ mmc-hs200-1_8v;
>> -ÂÂÂÂÂÂÂ ti,otap-del-sel = <0x2>;
>> +ÂÂÂÂÂÂÂ ti,otap-del-sel-legacy = <0x0>;
>> +ÂÂÂÂÂÂÂ ti,otap-del-sel-mmc-hs = <0x0>;
>> +ÂÂÂÂÂÂÂ ti,otap-del-sel-sd-hs = <0x0>;
>> +ÂÂÂÂÂÂÂ ti,otap-del-sel-sdr12 = <0x0>;
>> +ÂÂÂÂÂÂÂ ti,otap-del-sel-sdr25 = <0x0>;
>> +ÂÂÂÂÂÂÂ ti,otap-del-sel-sdr50 = <0x8>;
>> +ÂÂÂÂÂÂÂ ti,otap-del-sel-sdr104 = <0x5>;
> 
> Isn't this wrong? Doc claims the value for sdr104 should be 0x7?
> 

Yes. There seems to be an update to the document since I last updated the value.
Thanks for catching. I will post another version soon.

Thanks,
Faiz