Re: piix4-poweroff.c I/O BAR usage

[Maciej W. Rozycki]

On Thu, 21 May 2020, Paul Burton wrote:

> I'm reachable but lacking free time & with no access to Malta hardware
> I can't claim to be too useful here, so thanks for responding :)

 Great you're still around!  I hope you're doing good in this difficult 
time, and overall.  I have recently learnt WaveComp is no more. :(

> Before being moved to a driver (which was mostly driven by a desire to
> migrate Malta to a multi-platform/generic kernel using DT) this code
> was part of arch/mips/mti-malta/ where I added it in commit
> b6911bba598f ("MIPS: Malta: add suspend state entry code"). My main
> motivation at the time was to make QEMU exit after running poweroff,
> but I did ensure it worked on real Malta boards too (at least Malta-R
> with CoreFPGA6). Over the years since then it shocked a couple of
> hardware people to see software power off a Malta - if the original
> hardware designers had intended that to work then the knowledge had
> been lost over time :)

 Well, the Malta was designed by the Copenhagen team, which was dissolved 
IIRC back in 2003, so indeed the intent may have been lost in the mist of 
time.  I did know powering off is possible (same with the Atlas CompactPCI 
board if you ever came across one, not supported by Linux anymore) as it 
was inherent to the southbridge, and I remember discussing it once with 
Chris Shaw back in the MIPS UK days.  I guess the further it went, the 
more it became forgotten.

 Thanks for confirming it has been verified, though I was sure you did it 
anyway.

  Maciej