Re: [PATCH] MIPS: BCM63xx: fix 6328 boot selection bit

[Florian Fainelli]

On 5/26/2020 4:03 AM, Ãlvaro FernÃndez Rojas wrote:
> MISC_STRAP_BUS_BOOT_SEL_SHIFT is 18 according to Broadcom's GPL source code.
> 
> Signed-off-by: Ãlvaro FernÃndez Rojas <noltari@xxxxxxxxx>

This is correct:

Acked-by: Florian Fainelli <f.fainelli@xxxxxxxxx>

Fixes: e5766aea5b9b ("MIPS: BCM63XX: Add basic BCM6328 support")

> ---
>  arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
> index bc3444cd4ef2..9ceb5e72889f 100644
> --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
> +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
> @@ -1367,8 +1367,8 @@
>  #define MISC_STRAPBUS_6328_REG		0x240
>  #define STRAPBUS_6328_FCVO_SHIFT	7
>  #define STRAPBUS_6328_FCVO_MASK		(0x1f << STRAPBUS_6328_FCVO_SHIFT)
> -#define STRAPBUS_6328_BOOT_SEL_SERIAL	(1 << 28)
> -#define STRAPBUS_6328_BOOT_SEL_NAND	(0 << 28)
> +#define STRAPBUS_6328_BOOT_SEL_SERIAL	(1 << 18)
> +#define STRAPBUS_6328_BOOT_SEL_NAND	(0 << 18)
>  
>  /*************************************************************************
>   * _REG relative to RSET_PCIE
> 

-- 
Florian