Re: [PATCH v5 1/6] irqchip: Add Loongson HyperTransport Vector support
From: Marc Zyngier
Date: Fri May 29 2020 - 04:47:30 EST
On 2020-05-28 16:27, Jiaxun Yang wrote:
This controller appears on Loongson-3 chips for receiving interrupt
vectors from PCH's PIC and PCH's PCIe MSI interrupts.
Signed-off-by: Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx>
---
v2:
- Style cleanup
- Set ack callback and set correct edge_irq handler
v3:
- Correct bitops in ACK callback
v4:
- Drop irqsave for spinlocks
- Fix brace align and ordering issue thanks to tglx
---
When adding a changelog to a patch, please add the text after the '---'
delimiter, without adding an extra '---' at the end. This otherwise
confuses tools like mb2q or b4.
Please see Documentation/process/submitting-patches.rst ("14) The
canonical patch format").
I've fixed it up locally, no need to resend.
Thanks,
M.
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