Re: [PATCH v5 05/16] spi: dw: Add SPI Rx-done wait method to DMA-based transfer
From: Andy Shevchenko
Date: Fri May 29 2020 - 06:20:28 EST
On Fri, May 29, 2020 at 01:13:28PM +0300, Serge Semin wrote:
> On Fri, May 29, 2020 at 12:46:48PM +0300, Andy Shevchenko wrote:
> > On Fri, May 29, 2020 at 06:59:03AM +0300, Serge Semin wrote:
> > > Having any data left in the Rx FIFO after the DMA engine claimed it has
> > > finished all DMA transactions is an abnormal situation, since the DW SPI
> > > controller driver expects to have all the data being fetched and placed
> > > into the SPI Rx buffer at that moment. In case if this has happened we
> > > assume that DMA engine still may be doing the data fetching, thus we give
> > > it sometime to finish. If after a short period of time the data is still
> > > left in the Rx FIFO, the driver will give up waiting and return an error
> > > indicating that the SPI controller/DMA engine must have hung up or failed
> > > at some point of doing their duties.
> >
> > ...
> >
> > > +static int dw_spi_dma_wait_rx_done(struct dw_spi *dws)
> > > +{
> > > + int retry = WAIT_RETRIES;
> > > + struct spi_delay delay;
> > > + unsigned long ns, us;
> > > + u32 nents;
> > > +
> > > + /*
> > > + * It's unlikely that DMA engine is still doing the data fetching, but
> > > + * if it's let's give it some reasonable time. The timeout calculation
> > > + * is based on the synchronous APB/SSI reference clock rate, on a
> > > + * number of data entries left in the Rx FIFO, times a number of clock
> > > + * periods normally needed for a single APB read/write transaction
> > > + * without PREADY signal utilized (which is true for the DW APB SSI
> > > + * controller).
> > > + */
> > > + nents = dw_readl(dws, DW_SPI_RXFLR);
> >
>
> > > + ns = NSEC_PER_SEC / dws->max_freq * 4 * nents;
> >
> > I think we may slightly increase precision by writing this like
> >
> > ns = 4 * NSEC_PER_SEC / dws->max_freq * nents;
>
> Good point. Although both 4 and NSEC_PER_SEC are signed. The later is
> 1000000000L. Formally speaking on x32 systems (4 * 1000 000 000L) equals
> to a negative value. Though overflow still won't happen so the result will
> be correct. Anyway to be on a safe side it would be better to use an explicit
> unsigned literal:
>
> + ns = 4U * NSEC_PER_SEC / dws->max_freq * nents;
Yes, right.
--
With Best Regards,
Andy Shevchenko