[tip: irq/core] dt-bindings: interrupt-controller: Add Loongson PCH PIC

[tip-bot2 for Jiaxun Yang]

The following commit has been merged into the irq/core branch of tip:

Commit-ID:     b6e4bc125fc517969f97d901b1845ebf47bbea26
Gitweb:        https://git.kernel.org/tip/b6e4bc125fc517969f97d901b1845ebf47bbea26
Author:        Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx>
AuthorDate:    Thu, 28 May 2020 23:27:52 +08:00
Committer:     Marc Zyngier <maz@xxxxxxxxxx>
CommitterDate: Fri, 29 May 2020 09:42:18 +01:00

dt-bindings: interrupt-controller: Add Loongson PCH PIC

Add binding for Loongson PCH PIC Controller.

Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
Signed-off-by: Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx>
Signed-off-by: Marc Zyngier <maz@xxxxxxxxxx>
Link: https://lore.kernel.org/r/20200528152757.1028711-5-jiaxun.yang@xxxxxxxxxxx
---
 Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml | 56 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 56 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml

diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml
new file mode 100644
index 0000000..274adea
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml
@@ -0,0 +1,56 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/interrupt-controller/loongson,pch-pic.yaml#";
+$schema: "http://devicetree.org/meta-schemas/core.yaml#";
+
+title: Loongson PCH PIC Controller
+
+maintainers:
+  - Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx>
+
+description:
+  This interrupt controller is found in the Loongson LS7A family of PCH for
+  transforming interrupts from on-chip devices into HyperTransport vectorized
+  interrupts.
+
+properties:
+  compatible:
+    const: loongson,pch-pic-1.0
+
+  reg:
+    maxItems: 1
+
+  loongson,pic-base-vec:
+    description:
+      u32 value of the base of parent HyperTransport vector allocated
+      to PCH PIC.
+    allOf:
+      - $ref: "/schemas/types.yaml#/definitions/uint32"
+      - minimum: 0
+        maximum: 192
+
+  interrupt-controller: true
+
+  '#interrupt-cells':
+    const: 2
+
+required:
+  - compatible
+  - reg
+  - loongson,pic-base-vec
+  - interrupt-controller
+  - '#interrupt-cells'
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/irq.h>
+    pic: interrupt-controller@10000000 {
+      compatible = "loongson,pch-pic-1.0";
+      reg = <0x10000000 0x400>;
+      interrupt-controller;
+      #interrupt-cells = <2>;
+      loongson,pic-base-vec = <64>;
+      interrupt-parent = <&htvec>;
+    };
+...