[PATCH 12/12] KVM: arm64: Enable stage2 hardware DBM

From: Keqian Zhu
Date: Tue Jun 16 2020 - 05:36:33 EST


We are ready to support hw management of dirty state, enable it if
hardware support it.

Signed-off-by: Keqian Zhu <zhukeqian1@xxxxxxxxxx>
Signed-off-by: Peng Liang <liangpeng10@xxxxxxxxxx>
---
arch/arm64/include/asm/sysreg.h | 2 ++
arch/arm64/kvm/reset.c | 9 ++++++++-
2 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 463175f80341..b22bd903284d 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -744,6 +744,8 @@
#define ID_AA64MMFR1_VMIDBITS_8 0
#define ID_AA64MMFR1_VMIDBITS_16 2

+#define ID_AA64MMFR1_HADBS_DBS 2
+
/* id_aa64mmfr2 */
#define ID_AA64MMFR2_E0PD_SHIFT 60
#define ID_AA64MMFR2_FWB_SHIFT 40
diff --git a/arch/arm64/kvm/reset.c b/arch/arm64/kvm/reset.c
index 52bb801c9b2c..c1215b13bdd5 100644
--- a/arch/arm64/kvm/reset.c
+++ b/arch/arm64/kvm/reset.c
@@ -427,7 +427,7 @@ int kvm_arm_setup_stage2(struct kvm *kvm, unsigned long type)
{
u64 vtcr = VTCR_EL2_FLAGS, mmfr0;
u32 parange, phys_shift;
- u8 lvls;
+ u8 lvls, hadbs;

if (type & ~KVM_VM_TYPE_ARM_IPA_SIZE_MASK)
return -EINVAL;
@@ -465,6 +465,13 @@ int kvm_arm_setup_stage2(struct kvm *kvm, unsigned long type)
*/
vtcr |= VTCR_EL2_HA;

+#ifdef CONFIG_ARM64_HW_AFDBM
+ hadbs = (read_sysreg(id_aa64mmfr1_el1) >>
+ ID_AA64MMFR1_HADBS_SHIFT) & 0xf;
+ if (hadbs == ID_AA64MMFR1_HADBS_DBS)
+ vtcr |= VTCR_EL2_HD;
+#endif
+
/* Set the vmid bits */
vtcr |= (kvm_get_vmid_bits() == 16) ?
VTCR_EL2_VS_16BIT :
--
2.19.1