Re: [PATCH 08/21] x86/msr-index: Add bunch of MSRs for Arch LBR

[Peter Zijlstra]

On Fri, Jun 19, 2020 at 07:03:56AM -0700, kan.liang@xxxxxxxxxxxxxxx wrote:

> +#define ARCH_LBR_INFO_MISPRED		BIT_ULL(63)
> +#define ARCH_LBR_INFO_IN_TSX		BIT_ULL(62)
> +#define ARCH_LBR_INFO_TSX_ABORT		BIT_ULL(61)

That's identical to what we already have.

> +#define ARCH_LBR_INFO_CYC_CNT_VALID	BIT_ULL(60)

If you call that LBR_INFO_CYC_VALID or something, then we good there.

> +#define ARCH_LBR_INFO_BR_TYPE_OFFSET	56
> +#define ARCH_LBR_INFO_BR_TYPE		(0xfull << ARCH_LBR_INFO_BR_TYPE_OFFSET)

Same

> +#define ARCH_LBR_INFO_CYC_CNT		0xffff

And we already have that in LBR_INFO_CYCLES.