Re: [PATCH v3 04/17] arm64: dts: sc7180: Add OPP table for all qup devices

From: Matthias Kaehlcke
Date: Thu Jun 25 2020 - 11:17:19 EST

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Hi Rajendra,

On Tue, Apr 28, 2020 at 07:02:52PM +0530, Rajendra Nayak wrote:
> qup has a requirement to vote on the performance state of the CX domain
> in sc7180 devices. Add OPP tables for these and also add power-domains
> property for all qup instances.
>
> Signed-off-by: Rajendra Nayak <rnayak@xxxxxxxxxxxxxx>
> ---
> arch/arm64/boot/dts/qcom/sc7180.dtsi | 79 ++++++++++++++++++++++++++++++++++++
> 1 file changed, 79 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> index 998f101..efba600 100644
> --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> @@ -417,6 +417,25 @@
> status = "disabled";
> };
>
> + qup_opp_table: qup-opp-table {
> + compatible = "operating-points-v2";
> +
> + opp-75000000 {
> + opp-hz = /bits/ 64 <75000000>;
> + required-opps = <&rpmhpd_opp_low_svs>;
> + };
> +
> + opp-100000000 {
> + opp-hz = /bits/ 64 <100000000>;
> + required-opps = <&rpmhpd_opp_svs>;
> + };
> +
> + opp-128000000 {
> + opp-hz = /bits/ 64 <128000000>;
> + required-opps = <&rpmhpd_opp_nom>;
> + };
> + };
> +
> qupv3_id_0: geniqup@8c0000 {
> compatible = "qcom,geni-se-qup";
> reg = <0 0x008c0000 0 0x6000>;

no entries for i2c0?

> @@ -452,6 +471,8 @@
> interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SC7180_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -463,6 +484,8 @@
> pinctrl-names = "default";
> pinctrl-0 = <&qup_uart0_default>;
> interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
> + power-domains = <&rpmhpd SC7180_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -476,6 +499,8 @@
> interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SC7180_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -489,6 +514,8 @@
> interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SC7180_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -500,6 +527,8 @@
> pinctrl-names = "default";
> pinctrl-0 = <&qup_uart1_default>;
> interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
> + power-domains = <&rpmhpd SC7180_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -513,6 +542,8 @@
> interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SC7180_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -524,6 +555,8 @@
> pinctrl-names = "default";
> pinctrl-0 = <&qup_uart2_default>;
> interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
> + power-domains = <&rpmhpd SC7180_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -537,6 +570,8 @@
> interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SC7180_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -550,6 +585,8 @@
> interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SC7180_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -561,6 +598,8 @@
> pinctrl-names = "default";
> pinctrl-0 = <&qup_uart3_default>;
> interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>;
> + power-domains = <&rpmhpd SC7180_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -574,6 +613,8 @@
> interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SC7180_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -585,6 +626,8 @@
> pinctrl-names = "default";
> pinctrl-0 = <&qup_uart4_default>;
> interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
> + power-domains = <&rpmhpd SC7180_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -598,6 +641,8 @@
> interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SC7180_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -611,6 +656,8 @@
> interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SC7180_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -622,6 +669,8 @@
> pinctrl-names = "default";
> pinctrl-0 = <&qup_uart5_default>;
> interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
> + power-domains = <&rpmhpd SC7180_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
> };

no entries for i2c6?

> @@ -661,6 +710,8 @@
> interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SC7180_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -672,6 +723,8 @@
> pinctrl-names = "default";
> pinctrl-0 = <&qup_uart6_default>;
> interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
> + power-domains = <&rpmhpd SC7180_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -685,6 +738,8 @@
> interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SC7180_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -696,6 +751,8 @@
> pinctrl-names = "default";
> pinctrl-0 = <&qup_uart7_default>;
> interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
> + power-domains = <&rpmhpd SC7180_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -709,6 +766,8 @@
> interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SC7180_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -722,6 +781,8 @@
> interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SC7180_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -733,6 +794,8 @@
> pinctrl-names = "default";
> pinctrl-0 = <&qup_uart8_default>;
> interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
> + power-domains = <&rpmhpd SC7180_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -746,6 +809,8 @@
> interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SC7180_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -757,6 +822,8 @@
> pinctrl-names = "default";
> pinctrl-0 = <&qup_uart9_default>;
> interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
> + power-domains = <&rpmhpd SC7180_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -770,6 +837,8 @@
> interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SC7180_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -783,6 +852,8 @@
> interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SC7180_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -794,6 +865,8 @@
> pinctrl-names = "default";
> pinctrl-0 = <&qup_uart10_default>;
> interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
> + power-domains = <&rpmhpd SC7180_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -807,6 +880,8 @@
> interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SC7180_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -820,6 +895,8 @@
> interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
> #address-cells = <1>;
> #size-cells = <0>;
> + power-domains = <&rpmhpd SC7180_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
>
> @@ -831,6 +908,8 @@
> pinctrl-names = "default";
> pinctrl-0 = <&qup_uart11_default>;
> interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
> + power-domains = <&rpmhpd SC7180_CX>;
> + operating-points-v2 = <&qup_opp_table>;
> status = "disabled";
> };
> }

Next message: Petr Mladek: "pending output optimization: was: [PATCH v3 3/3] printk: use the lockless ringbuffer"
Previous message: Arnd Bergmann: "Re: [PATCH V2] firmware: imx: Move i.MX SCU soc driver into imx firmware folder"
Next in thread: Rajendra Nayak: "Re: [PATCH v3 04/17] arm64: dts: sc7180: Add OPP table for all qup devices"
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