[PATCH 1/4] arm64: dts: sdm845: Add OPP table for all qup devices

From: Rajendra Nayak
Date: Tue Jun 30 2020 - 04:46:01 EST

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In reply to: Matthias Kaehlcke: "Re: [PATCH 3/4] arm64: dts: sdm845: Add sdhc opps and power-domains"
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qup has a requirement to vote on the performance state of the CX domain
in sdm845 devices. Add OPP tables for these and also add power-domains
property for all qup instances for uart and spi.
i2c does not support scaling and uses a fixed clock.

Signed-off-by: Rajendra Nayak <rnayak@xxxxxxxxxxxxxx>
Signed-off-by: Stephen Boyd <swboyd@xxxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 83 ++++++++++++++++++++++++++++++++++++
1 file changed, 83 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 8eb5a31..db1f82b 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -805,6 +805,25 @@
clock-names = "core";
};

+ qup_opp_table: qup-opp-table {
+ compatible = "operating-points-v2";
+
+ opp-19200000 {
+ opp-hz = /bits/ 64 <19200000>;
+ required-opps = <&rpmhpd_opp_min_svs>;
+ };
+
+ opp-75000000 {
+ opp-hz = /bits/ 64 <75000000>;
+ required-opps = <&rpmhpd_opp_low_svs>;
+ };
+
+ opp-100000000 {
+ opp-hz = /bits/ 64 <100000000>;
+ required-opps = <&rpmhpd_opp_svs>;
+ };
+ };
+
qupv3_id_0: geniqup@8c0000 {
compatible = "qcom,geni-se-qup";
reg = <0 0x008c0000 0 0x6000>;
@@ -839,6 +858,8 @@
interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
+ power-domains = <&rpmhpd SDM845_CX>;
+ operating-points-v2 = <&qup_opp_table>;
status = "disabled";
};

@@ -850,6 +871,8 @@
pinctrl-names = "default";
pinctrl-0 = <&qup_uart0_default>;
interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&rpmhpd SDM845_CX>;
+ operating-points-v2 = <&qup_opp_table>;
status = "disabled";
};

@@ -876,6 +899,8 @@
interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
+ power-domains = <&rpmhpd SDM845_CX>;
+ operating-points-v2 = <&qup_opp_table>;
status = "disabled";
};

@@ -887,6 +912,8 @@
pinctrl-names = "default";
pinctrl-0 = <&qup_uart1_default>;
interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&rpmhpd SDM845_CX>;
+ operating-points-v2 = <&qup_opp_table>;
status = "disabled";
};

@@ -913,6 +940,8 @@
interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
+ power-domains = <&rpmhpd SDM845_CX>;
+ operating-points-v2 = <&qup_opp_table>;
status = "disabled";
};

@@ -924,6 +953,8 @@
pinctrl-names = "default";
pinctrl-0 = <&qup_uart2_default>;
interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&rpmhpd SDM845_CX>;
+ operating-points-v2 = <&qup_opp_table>;
status = "disabled";
};

@@ -950,6 +981,8 @@
interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
+ power-domains = <&rpmhpd SDM845_CX>;
+ operating-points-v2 = <&qup_opp_table>;
status = "disabled";
};

@@ -961,6 +994,8 @@
pinctrl-names = "default";
pinctrl-0 = <&qup_uart3_default>;
interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&rpmhpd SDM845_CX>;
+ operating-points-v2 = <&qup_opp_table>;
status = "disabled";
};

@@ -987,6 +1022,8 @@
interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
+ power-domains = <&rpmhpd SDM845_CX>;
+ operating-points-v2 = <&qup_opp_table>;
status = "disabled";
};

@@ -998,6 +1035,8 @@
pinctrl-names = "default";
pinctrl-0 = <&qup_uart4_default>;
interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&rpmhpd SDM845_CX>;
+ operating-points-v2 = <&qup_opp_table>;
status = "disabled";
};

@@ -1024,6 +1063,8 @@
interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
+ power-domains = <&rpmhpd SDM845_CX>;
+ operating-points-v2 = <&qup_opp_table>;
status = "disabled";
};

@@ -1035,6 +1076,8 @@
pinctrl-names = "default";
pinctrl-0 = <&qup_uart5_default>;
interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&rpmhpd SDM845_CX>;
+ operating-points-v2 = <&qup_opp_table>;
status = "disabled";
};

@@ -1061,6 +1104,8 @@
interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
+ power-domains = <&rpmhpd SDM845_CX>;
+ operating-points-v2 = <&qup_opp_table>;
status = "disabled";
};

@@ -1072,6 +1117,8 @@
pinctrl-names = "default";
pinctrl-0 = <&qup_uart6_default>;
interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&rpmhpd SDM845_CX>;
+ operating-points-v2 = <&qup_opp_table>;
status = "disabled";
};

@@ -1098,6 +1145,8 @@
interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
+ power-domains = <&rpmhpd SDM845_CX>;
+ operating-points-v2 = <&qup_opp_table>;
status = "disabled";
};

@@ -1109,6 +1158,8 @@
pinctrl-names = "default";
pinctrl-0 = <&qup_uart7_default>;
interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&rpmhpd SDM845_CX>;
+ operating-points-v2 = <&qup_opp_table>;
status = "disabled";
};
};
@@ -1147,6 +1198,8 @@
interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
+ power-domains = <&rpmhpd SDM845_CX>;
+ operating-points-v2 = <&qup_opp_table>;
status = "disabled";
};

@@ -1158,6 +1211,8 @@
pinctrl-names = "default";
pinctrl-0 = <&qup_uart8_default>;
interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&rpmhpd SDM845_CX>;
+ operating-points-v2 = <&qup_opp_table>;
status = "disabled";
};

@@ -1184,6 +1239,8 @@
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
+ power-domains = <&rpmhpd SDM845_CX>;
+ operating-points-v2 = <&qup_opp_table>;
status = "disabled";
};

@@ -1195,6 +1252,8 @@
pinctrl-names = "default";
pinctrl-0 = <&qup_uart9_default>;
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&rpmhpd SDM845_CX>;
+ operating-points-v2 = <&qup_opp_table>;
status = "disabled";
};

@@ -1221,6 +1280,8 @@
interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
+ power-domains = <&rpmhpd SDM845_CX>;
+ operating-points-v2 = <&qup_opp_table>;
status = "disabled";
};

@@ -1232,6 +1293,8 @@
pinctrl-names = "default";
pinctrl-0 = <&qup_uart10_default>;
interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&rpmhpd SDM845_CX>;
+ operating-points-v2 = <&qup_opp_table>;
status = "disabled";
};

@@ -1258,6 +1321,8 @@
interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
+ power-domains = <&rpmhpd SDM845_CX>;
+ operating-points-v2 = <&qup_opp_table>;
status = "disabled";
};

@@ -1269,6 +1334,8 @@
pinctrl-names = "default";
pinctrl-0 = <&qup_uart11_default>;
interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&rpmhpd SDM845_CX>;
+ operating-points-v2 = <&qup_opp_table>;
status = "disabled";
};

@@ -1295,6 +1362,8 @@
interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
+ power-domains = <&rpmhpd SDM845_CX>;
+ operating-points-v2 = <&qup_opp_table>;
status = "disabled";
};

@@ -1306,6 +1375,8 @@
pinctrl-names = "default";
pinctrl-0 = <&qup_uart12_default>;
interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&rpmhpd SDM845_CX>;
+ operating-points-v2 = <&qup_opp_table>;
status = "disabled";
};

@@ -1332,6 +1403,8 @@
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
+ power-domains = <&rpmhpd SDM845_CX>;
+ operating-points-v2 = <&qup_opp_table>;
status = "disabled";
};

@@ -1343,6 +1416,8 @@
pinctrl-names = "default";
pinctrl-0 = <&qup_uart13_default>;
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&rpmhpd SDM845_CX>;
+ operating-points-v2 = <&qup_opp_table>;
status = "disabled";
};

@@ -1369,6 +1444,8 @@
interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
+ power-domains = <&rpmhpd SDM845_CX>;
+ operating-points-v2 = <&qup_opp_table>;
status = "disabled";
};

@@ -1380,6 +1457,8 @@
pinctrl-names = "default";
pinctrl-0 = <&qup_uart14_default>;
interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&rpmhpd SDM845_CX>;
+ operating-points-v2 = <&qup_opp_table>;
status = "disabled";
};

@@ -1406,6 +1485,8 @@
interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
+ power-domains = <&rpmhpd SDM845_CX>;
+ operating-points-v2 = <&qup_opp_table>;
status = "disabled";
};

@@ -1417,6 +1498,8 @@
pinctrl-names = "default";
pinctrl-0 = <&qup_uart15_default>;
interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&rpmhpd SDM845_CX>;
+ operating-points-v2 = <&qup_opp_table>;
status = "disabled";
};
};
--
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Next message: Rajendra Nayak: "[PATCH 2/4] arm64: dts: sc7180: Add OPP table for all qup devices"
Previous message: Rajendra Nayak: "[PATCH 3/4] arm64: dts: sdm845: Add sdhc opps and power-domains"
In reply to: Matthias Kaehlcke: "Re: [PATCH 3/4] arm64: dts: sdm845: Add sdhc opps and power-domains"
Next in thread: Matthias Kaehlcke: "Re: [PATCH 1/4] arm64: dts: sdm845: Add OPP table for all qup devices"
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