On 2020-07-02 21:16, Tomasz Nowicki wrote:
Add specific compatible string for Marvell usage due to errata of
accessing 64bits registers of ARM SMMU, in AP806.
AP806 SoC uses the generic ARM-MMU500, and there's no specific
implementation of Marvell, this compatible is used for errata only.
Signed-off-by: Hanna Hawa <hannah@xxxxxxxxxxx>
Signed-off-by: Gregory CLEMENT <gregory.clement@xxxxxxxxxxx>
Signed-off-by: Tomasz Nowicki <tn@xxxxxxxxxxxx>
---
 Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 5 +++++
 1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
index d7ceb4c34423..7beca9c00b12 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
@@ -38,6 +38,11 @@ properties:
ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ - qcom,sc7180-smmu-500
ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ - qcom,sdm845-smmu-500
ÂÂÂÂÂÂÂÂÂÂÂ - const: arm,mmu-500
+ÂÂÂÂÂ - description: Marvell SoCs implementing "arm,mmu-500"
+ÂÂÂÂÂÂÂ items:
+ÂÂÂÂÂÂÂÂÂ - enum:
+ÂÂÂÂÂÂÂÂÂÂÂÂÂ - marvell,ap806-smmu-500
Isn't a single-valued enum just a constant? :P