Re: [PATCH v3 4/4] arm64: dts: marvell: add SMMU support

[Tomasz Nowicki]

On 03.07.2020 11:16, Robin Murphy wrote:
> On 2020-07-02 21:16, Tomasz Nowicki wrote:
> > From: Marcin Wojtas <mw@xxxxxxxxxxxx>
> >
> > Add IOMMU node for Marvell AP806 based SoCs together with platform
> > and PCI device Stream ID mapping.
> >
> > Signed-off-by: Marcin Wojtas <mw@xxxxxxxxxxxx>
> > Signed-off-by: Tomasz Nowicki <tn@xxxxxxxxxxxx>
> > ---
> >  arch/arm64/boot/dts/marvell/armada-8040.dtsi | 36 +++++++++++++++++++
> > Â arch/arm64/boot/dts/marvell/armada-ap80x.dtsi | 17 +++++++++
> > Â 2 files changed, 53 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/marvell/armada-8040.dtsi 
> > b/arch/arm64/boot/dts/marvell/armada-8040.dtsi
> > index 7699b19224c2..25c1df709f72 100644
> > --- a/arch/arm64/boot/dts/marvell/armada-8040.dtsi
> > +++ b/arch/arm64/boot/dts/marvell/armada-8040.dtsi
> > @@ -23,3 +23,39 @@
> > Â &cp0_rtc {
> > ÂÂÂÂÂ status = "disabled";
> > Â };
> > +
> > +&cp0_usb3_0 {
> > +ÂÂÂ iommus = <&smmu 0x440>;
> > +};
> > +
> > +&cp0_usb3_1 {
> > +ÂÂÂ iommus = <&smmu 0x441>;
> > +};
> > +
> > +&cp0_sata0 {
> > +ÂÂÂ iommus = <&smmu 0x444>;
> > +};
> > +
> > +&cp0_sdhci0 {
> > +ÂÂÂ iommus = <&smmu 0x445>;
> > +};
> > +
> > +&cp1_sata0 {
> > +ÂÂÂ iommus = <&smmu 0x454>;
> > +};
> > +
> > +&cp1_usb3_0 {
> > +ÂÂÂ iommus = <&smmu 0x450>;
> > +};
> > +
> > +&cp1_usb3_1 {
> > +ÂÂÂ iommus = <&smmu 0x451>;
> > +};
> > +
> > +&cp0_pcie0 {
> > +ÂÂÂ iommu-map =
> > +ÂÂÂÂÂÂÂ <0x0ÂÂ &smmu 0x480 0x20>,
> > +ÂÂÂÂÂÂÂ <0x100 &smmu 0x4a0 0x20>,
> > +ÂÂÂÂÂÂÂ <0x200 &smmu 0x4c0 0x20>;
> > +ÂÂÂ iommu-map-mask = <0x031f>;
>
> Nice! I do like a good compressed mapping :D
>
> > +};
> > diff --git a/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi 
> > b/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
> > index 7f9b9a647717..ded8b8082d79 100644
> > --- a/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
> > +++ b/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
> > @@ -56,6 +56,23 @@
> > ÂÂÂÂÂÂÂÂÂÂÂÂÂ compatible = "simple-bus";
> > ÂÂÂÂÂÂÂÂÂÂÂÂÂ ranges = <0x0 0x0 0xf0000000 0x1000000>;
> > +ÂÂÂÂÂÂÂÂÂÂÂ smmu: iommu@5000000 {
> > +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ compatible = "marvell,ap806-smmu-500", "arm,mmu-500";
> > +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ reg = <0x100000 0x100000>;
> > +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ dma-coherent;
> > +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ #iommu-cells = <1>;
> > +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ #global-interrupts = <1>;
> > +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
> > +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
> > +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
> > +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
> > +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
> > +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
> > +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
> > +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
> > +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
>
> I'd recommend you have the node disabled by default here, then 
> explicitly enable it in armada-8040.dtsi where you add the Stream IDs. 
> Otherwise it will also end up enabled for 8020, 70x0, etc. where 
> disable_bypass will then catastrophically break everything.

Good point! I will fix this.

Thanks,
Tomasz