Re: [PATCH 0/9] Add PCIe support for IPQ8074

[Bjorn Helgaas]

On Sun, Jul 05, 2020 at 02:47:51PM +0530, Sivaprakash Murugesan wrote:
> IPQ8074 has two PCIe ports both are based on synopsis designware PCIe
> controller. while it was assumed that PCIe support for IPQ8074 was already
> available. PCIe was not functional until now.
> 
> This patch series adds support for PCIe ports on IPQ8074.
> 
> First PCIe port is of gen2 synposis version is 2_3_2 which has already been
> enabled. But it had some problems on phy init and needed dt updates.
> 
> Second PCIe port is gen3 synopsis version is 2_9_0. This series adds
> support for this PCIe port while fixing dt nodes.
> 
> Patch 1 on this series depends on qcom pcie bindings patch
> https://lkml.org/lkml/2020/6/24/162
> 
> Sivaprakash Murugesan (9):
>   dt-bindings: pci: Add ipq8074 gen3 pci compatible
>   dt-bindings: phy: qcom,qmp: Add dt-binding for ipq8074 gen3 pcie phy
>   clk: qcom: ipq8074: Add missing bindings for pcie
>   clk: qcom: ipq8074: Add missing clocks for pcie
>   phy: qcom-qmp: use correct values for ipq8074 gen2 pcie phy init
>   phy: qcom-qmp: Add compatible for ipq8074 pcie gen3 qmp phy
>   pci: dwc: qcom: do phy power on before pcie init
>   pci: qcom: Add support for ipq8074 pci controller
>   arm64: dts: ipq8074: Fixup pcie dts nodes

No comment on the patches themselves, but please update the subject
lines so they follow the conventions:

  dt-bindings: PCI: qcom: Add ipq8074 PCIe Gen3 support
  dt-bindings: phy: qcom,qmp: Add ipq8074 PCIe Gen3 phy
  clk: qcom: ipq8074: Add missing bindings for PCIe
  clk: qcom: ipq8074: Add missing clocks for PCIe
  phy: qcom-qmp: Use correct values for ipq8074 PCIe Gen2 PHY init
  PCI: qcom: Do PHY power on before PCIe init
  PCI: qcom: Add ipq8074 PCIe controller support
  arm64: dts: ipq8074: Fixup PCIe DTS nodes

Also fix the same things in the commit logs, e.g., consistently use
"PCIe" instead of "pcie", "Gen2" instead of "gen2", etc.  For example:

  ipq8074 has two PCIe ports while the support for gen2 pcie port ...

What's the point of using "PCIe" for the first and "pcie" for the
second?

You can learn all this by using "git log" and "git log --online".

>  .../devicetree/bindings/pci/qcom,pcie.yaml         |  47 ++++++
>  .../devicetree/bindings/phy/qcom,qmp-phy.yaml      |   1 +
>  arch/arm64/boot/dts/qcom/ipq8074-hk01.dts          |   8 +-
>  arch/arm64/boot/dts/qcom/ipq8074.dtsi              | 109 ++++++++----
>  drivers/clk/qcom/gcc-ipq8074.c                     |  60 +++++++
>  drivers/pci/controller/dwc/pcie-qcom.c             | 187 +++++++++++++++++++-
>  drivers/phy/qualcomm/phy-qcom-pcie3-qmp.h          | 132 +++++++++++++++
>  drivers/phy/qualcomm/phy-qcom-qmp.c                | 188 ++++++++++++++++++++-
>  drivers/phy/qualcomm/phy-qcom-qmp.h                |   2 +
>  include/dt-bindings/clock/qcom,gcc-ipq8074.h       |   4 +
>  10 files changed, 683 insertions(+), 55 deletions(-)
>  create mode 100644 drivers/phy/qualcomm/phy-qcom-pcie3-qmp.h
> 
> -- 
> 2.7.4
>