Re: [PATCH v2 1/4] x86/cpufeatures: Add enumeration for SERIALIZE instruction

[Ricardo Neri]

On Tue, Jul 07, 2020 at 09:36:15AM -0700, Andy Lutomirski wrote:
> On Mon, Jul 6, 2020 at 7:21 PM Cathy Zhang <cathy.zhang@xxxxxxxxx> wrote:
> >
> > This instruction gives software a way to force the processor to complete
> > all modifications to flags, registers and memory from previous instructions
> > and drain all buffered writes to memory before the next instruction is
> > fetched and executed.
> >
> > The same effect can be obtained using the cpuid instruction. However,
> > cpuid causes modification on the eax, ebx, ecx, and ecx regiters; it
> > also causes a VM exit.
> >
> > A processor supports SERIALIZE instruction if CPUID.0x0x.0x0:EDX[14] is
> > present. The CPU feature flag is shown as "serialize" in /proc/cpuinfo.
> >
> > Detailed information on the instructions and CPUID feature flag SERIALIZE
> > can be found in the latest Intel Architecture Instruction Set Extensions
> > and Future Features Programming Reference and Intel 64 and IA-32
> > Architectures Software Developer's Manual.
> 
> Can you also wire this up so sync_core() uses it?

I am cc'ing Fenghua, who has volunteered to work on this. Addind support
for SERIALIZE in sync_core() should not block merging these patches,
correct?

Thanks and BR,
Ricardo