[PATCH 1/14 v3] IB/hfi1: Check the return value of pcie_capability_read_*()

From: Saheed O. Bolarinwa
Date: Mon Jul 13 2020 - 12:55:15 EST


From: Bolarinwa Olayemi Saheed <refactormyself@xxxxxxxxx>

On failure pcie_capability_read_dword() sets it's last parameter,
val to 0. In this case dn and up will be 0, so aspm_hw_l1_supported()
will return false.
However, with Patch 14/14, it is possible that val is set to ~0 on
failure. This would introduce a bug because (x & x) == (~0 & x). So with
dn and up being 0x02, a true value is return when the read has actually
failed.

This bug can be avoided if the return value of pcie_capability_read_dword
is checked to confirm success. The behaviour of the function remains
intact.

Check the return value of pcie_capability_read_dword() to ensure success.

Suggested-by: Bjorn Helgaas <bjorn@xxxxxxxxxxx>
Signed-off-by: Bolarinwa Olayemi Saheed <refactormyself@xxxxxxxxx>
---
drivers/infiniband/hw/hfi1/aspm.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/infiniband/hw/hfi1/aspm.c b/drivers/infiniband/hw/hfi1/aspm.c
index a3c53be4072c..80d0b3edd983 100644
--- a/drivers/infiniband/hw/hfi1/aspm.c
+++ b/drivers/infiniband/hw/hfi1/aspm.c
@@ -24,6 +24,7 @@ static bool aspm_hw_l1_supported(struct hfi1_devdata *dd)
{
struct pci_dev *parent = dd->pcidev->bus->self;
u32 up, dn;
+ int ret_up, ret_dn;

/*
* If the driver does not have access to the upstream component,
@@ -32,14 +33,14 @@ static bool aspm_hw_l1_supported(struct hfi1_devdata *dd)
if (!parent)
return false;

- pcie_capability_read_dword(dd->pcidev, PCI_EXP_LNKCAP, &dn);
+ ret_dn = pcie_capability_read_dword(dd->pcidev, PCI_EXP_LNKCAP, &dn);
dn = ASPM_L1_SUPPORTED(dn);

- pcie_capability_read_dword(parent, PCI_EXP_LNKCAP, &up);
+ ret_up = pcie_capability_read_dword(parent, PCI_EXP_LNKCAP, &up);
up = ASPM_L1_SUPPORTED(up);

/* ASPM works on A-step but is reported as not supported */
- return (!!dn || is_ax(dd)) && !!up;
+ return !!ret_dn && !!ret_up && (!!dn || is_ax(dd)) && !!up;
}

/* Set L1 entrance latency for slower entry to L1 */
--
2.18.2