Re: [PATCH v2 3/4] x86: Expose SERIALIZE for supported cpuid

[Zhang, Cathy]

On 7/14/2020 11:00 AM, Sean Christopherson wrote:
> On Tue, Jul 07, 2020 at 10:16:22AM +0800, Cathy Zhang wrote:
> > SERIALIZE instruction is supported by intel processors,
> > like Sapphire Rapids. Expose it in KVM supported cpuid.
> Providing at least a rough overview of the instruction, e.g. its enumeration,
> usage, fault rules, controls, etc... would be nice.  In isolation, the
> changelog isn't remotely helpful in understanding the correctness of the
> patch.
Thanks Sean! Add it in the next version.
> > Signed-off-by: Cathy Zhang <cathy.zhang@xxxxxxxxx>
> > ---
> >   arch/x86/kvm/cpuid.c | 3 ++-
> >   1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
> > index 8a294f9..e603aeb 100644
> > --- a/arch/x86/kvm/cpuid.c
> > +++ b/arch/x86/kvm/cpuid.c
> > @@ -341,7 +341,8 @@ void kvm_set_cpu_caps(void)
> >   	kvm_cpu_cap_mask(CPUID_7_EDX,
> >   		F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(SPEC_CTRL) |
> >   		F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) |
> > -		F(MD_CLEAR) | F(AVX512_VP2INTERSECT) | F(FSRM)
> > +		F(MD_CLEAR) | F(AVX512_VP2INTERSECT) | F(FSRM) |
> > +		F(SERIALIZE)
> >   	);
> >   
> >   	/* TSC_ADJUST and ARCH_CAPABILITIES are emulated in software. */
> > --
> > 1.8.3.1