Re: [PATCH v3 2/2] phy: socionext: Add UniPhier AHCI PHY driver support

From: Vinod Koul
Date: Thu Jul 16 2020 - 02:37:56 EST


On 16-07-20, 11:43, Kunihiko Hayashi wrote:

> +static int uniphier_ahciphy_pxs3_init(struct uniphier_ahciphy_priv *priv)
> +{
> + int i;
> + u32 val;
> +
> + /* setup port parameter */
> + val = readl(priv->base + TXCTRL0);
> + val &= ~TXCTRL0_AMP_G3_MASK;
> + val |= FIELD_PREP(TXCTRL0_AMP_G3_MASK, 0x73);
> + val &= ~TXCTRL0_AMP_G2_MASK;
> + val |= FIELD_PREP(TXCTRL0_AMP_G2_MASK, 0x46);
> + val &= ~TXCTRL0_AMP_G1_MASK;
> + val |= FIELD_PREP(TXCTRL0_AMP_G1_MASK, 0x42);
> + writel(val, priv->base + TXCTRL0);
> +
> + val = readl(priv->base + TXCTRL1);
> + val &= ~TXCTRL1_DEEMPH_G3_MASK;
> + val |= FIELD_PREP(TXCTRL1_DEEMPH_G3_MASK, 0x23);
> + val &= ~TXCTRL1_DEEMPH_G2_MASK;
> + val |= FIELD_PREP(TXCTRL1_DEEMPH_G2_MASK, 0x05);
> + val &= ~TXCTRL1_DEEMPH_G1_MASK;
> + val |= FIELD_PREP(TXCTRL1_DEEMPH_G1_MASK, 0x05);
> +
> + val = readl(priv->base + RXCTRL);
> + val &= ~RXCTRL_LOS_LVL_MASK;
> + val |= FIELD_PREP(RXCTRL_LOS_LVL_MASK, 0x9);
> + val &= ~RXCTRL_LOS_BIAS_MASK;
> + val |= FIELD_PREP(RXCTRL_LOS_BIAS_MASK, 0x2);
> + val &= ~RXCTRL_RX_EQ_MASK;
> + val |= FIELD_PREP(RXCTRL_RX_EQ_MASK, 0x1);
> +
> + /* dummy read 25 times to make a wait time for the phy to stablize */

s/stablize/stabilize

> +static int uniphier_ahciphy_power_off(struct phy *phy)
> +{
> + struct uniphier_ahciphy_priv *priv = phy_get_drvdata(phy);
> + int ret = 0;
> +
> + if (priv->data->power_off)
> + ret = priv->data->power_off(priv);
> +
> + reset_control_assert(priv->rst);
> + clk_disable_unprepare(priv->clk);
> +
> + return ret;
> +}
> +
> +

multiple blank lines

> +static const struct phy_ops uniphier_ahciphy_ops = {
> + .init = uniphier_ahciphy_init,
> + .exit = uniphier_ahciphy_exit,
> + .power_on = uniphier_ahciphy_power_on,
> + .power_off = uniphier_ahciphy_power_off,
> + .owner = THIS_MODULE,
> +};
> +
> +static int uniphier_ahciphy_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct uniphier_ahciphy_priv *priv;
> + struct phy *phy;
> + struct phy_provider *phy_provider;
> +
> + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
> + if (!priv)
> + return -ENOMEM;
> +
> + priv->dev = dev;
> + priv->data = of_device_get_match_data(dev);
> + if (WARN_ON(!priv->data))
> + return -EINVAL;
> +
> + priv->base = devm_platform_ioremap_resource(pdev, 0);
> + if (IS_ERR(priv->base))
> + return PTR_ERR(priv->base);
> +
> + priv->clk_parent = devm_clk_get(dev, "link");
> + if (IS_ERR(priv->clk_parent))
> + return PTR_ERR(priv->clk_parent);
> +
> + if (priv->data->is_phy_clk) {
> + priv->clk = devm_clk_get(dev, "phy");
> + if (IS_ERR(priv->clk))
> + return PTR_ERR(priv->clk);
> + }
> +
> + priv->rst_parent = devm_reset_control_get_shared(dev, "link");
> + if (IS_ERR(priv->rst_parent))
> + return PTR_ERR(priv->rst_parent);
> +
> + priv->rst = devm_reset_control_get_shared(dev, "phy");
> + if (IS_ERR(priv->rst))
> + return PTR_ERR(priv->rst);
> +
> + phy = devm_phy_create(dev, dev->of_node, &uniphier_ahciphy_ops);
> + if (IS_ERR(phy)) {
> + dev_err(dev, "failed to create phy\n");
> + return PTR_ERR(phy);
> + }
> +
> + phy_set_drvdata(phy, priv);
> + phy_provider = devm_of_phy_provider_register(dev,
> + of_phy_simple_xlate);

single line?

--
~Vinod