Re: [PATCH] irqchip/gic-v4.1: Ensure accessing the correct RD when writing INVALLR

[Marc Zyngier]

Hi Zenghui,

On 2020-07-20 03:27, Zenghui Yu wrote:
> Hi Marc,
>
> On 2020/7/17 19:07, Marc Zyngier wrote:
> > On Thu, 09 Jul 2020 14:49:59 +0100,
> > Zenghui Yu <yuzenghui@xxxxxxxxxx> wrote:
> > > The GICv4.1 spec tells us that it's CONSTRAINED UNPREDICTABLE to 
> > > issue a
> > > register-based invalidation operation for a vPEID not mapped to that 
> > > RD,
> > > or another RD within the same CommonLPIAff group.
> > >
> > > To follow this rule, commit f3a059219bc7 ("irqchip/gic-v4.1: Ensure 
> > > mutual
> > > exclusion between vPE affinity change and RD access") tried to 
> > > address the
> > > race between the RD accesses and the vPE affinity change, but somehow
> > > forgot to take GICR_INVALLR into account. Let's take the vpe_lock 
> > > before
> > > evaluating vpe->col_idx to fix it.
> > >
> > > Signed-off-by: Zenghui Yu <yuzenghui@xxxxxxxxxx>
> >
> > Shouldn't this deserve a Fixes: tag?
>
> Yes, I think a
>
> Fixes: f3a059219bc7 ("irqchip/gic-v4.1: Ensure mutual exclusion
> between vPE affinity change and RD access")
>
> should be enough. Should I resend a version with the tag added?

Yes, please, together with a Cc: stable@xxxxxxxxxxxxxxx, as the
original patch is in 5.7 and I intend to take it via the 5.9
branch.

Thanks,

        M.
--
Jazz is not dead. It just smells funny...