Re: [PATCH 2/2] riscv: Simplify the checking for SR_PP

From: Palmer Dabbelt
Date: Tue Jul 21 2020 - 22:59:06 EST


On Mon, 13 Jul 2020 01:32:16 PDT (-0700), greentime.hu@xxxxxxxxxx wrote:
This patch simplifies the checking for SR_MPP and SR_SPP. It uses SR_PP in the
code flow for both m-mode and s-mode then we can remove the ifdef here.

Signed-off-by: Greentime Hu <greentime.hu@xxxxxxxxxx>
---
arch/riscv/kernel/entry.S | 7 +------
1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S
index 000984695cd6..597beae0d238 100644
--- a/arch/riscv/kernel/entry.S
+++ b/arch/riscv/kernel/entry.S
@@ -210,13 +210,8 @@ ret_from_syscall_rejected:
ret_from_exception:
REG_L s0, PT_STATUS(sp)
csrc CSR_STATUS, SR_IE
-#ifdef CONFIG_RISCV_M_MODE
- /* the MPP value is too large to be used as an immediate arg for addi */
- li t0, SR_MPP
+ li t0, SR_PP
and s0, s0, t0
-#else
- andi s0, s0, SR_SPP
-#endif
bnez s0, resume_kernel

resume_userspace:

This one is actually on a fairly fast path, so I can buy it's worth saving the
cycle.