Re: [PATCH 5/7] i2c: tegra: enable second level clock gating

[Dmitry Osipenko]

23.07.2020 15:18, Krishna Yarlagadda ÐÐÑÐÑ:
> Enable Second Level Clock Gating feature for supported chips.
> With SLCG enabled, software need not control clocks anymore
> and leave clocks enabled always on.

What problem is solved by this patch? If there is no real problem, then
I'm not sure that this is a worthwhile patch. Please explain.

...
> @@ -1932,7 +1946,8 @@ static int __maybe_unused tegra_i2c_suspend(struct device *dev)
>  	struct tegra_i2c_dev *i2c_dev = dev_get_drvdata(dev);
>  	int err = 0;
>  
> -	i2c_mark_adapter_suspended(&i2c_dev->adapter);

Why i2c_mark_adapter_suspended() is removed?

> +	if (i2c_dev->is_clkon_always)
> +		clk_disable(i2c_dev->div_clk);

Why clk needs to be disabled on suspend?

>  	if (!pm_runtime_status_suspended(dev))
>  		err = tegra_i2c_runtime_suspend(dev);
> @@ -1968,6 +1983,15 @@ static int __maybe_unused tegra_i2c_resume(struct device *dev)
>  			return err;
>  	}
>  
> +	if (i2c_dev->is_clkon_always) {
> +		err = clk_enable(i2c_dev->div_clk);
> +		if (err < 0) {
> +			dev_err(i2c_dev->dev, "clock enable failed %d\n",
> +				err);
> +			return err;
> +		}
> +	}

Would be nice if it all could be wrapped into
tegra_i2c_div_clk_enable/disable() helpers.

>  	i2c_mark_adapter_resumed(&i2c_dev->adapter);
>  
>  	return 0;
>