Re: [PATCH] crypto: sun8i-ce - Fix writel byte-order on big-endian

[Corentin Labbe]

On Tue, Jul 28, 2020 at 04:00:40PM +1000, Herbert Xu wrote:
> On Tue, Jul 28, 2020 at 01:10:13PM +0800, kernel test robot wrote:
> > tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
> > head:   92ed301919932f777713b9172e525674157e983d
> > commit: 93c7f4d357de68f1e3a998b2fc775466d75c4c07 crypto: sun8i-ce - enable working on big endian
> > date:   8 months ago
> > config: arm64-randconfig-s031-20200728 (attached as .config)
> > compiler: aarch64-linux-gcc (GCC) 9.3.0
> > reproduce:
> >         wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
> >         chmod +x ~/bin/make.cross
> >         # apt-get install sparse
> >         # sparse version: v0.6.2-94-geb6779f6-dirty
> >         git checkout 93c7f4d357de68f1e3a998b2fc775466d75c4c07
> >         # save the attached .config to linux build tree
> >         COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=arm64 
> > 
> > If you fix the issue, kindly add following tag as appropriate
> > Reported-by: kernel test robot <lkp@xxxxxxxxx>
> 
> This looks like a real bug.
> 
> ---8<---
> As writel does endianness swapping by default we need to undo
> any swapping that we have done before using it.
> 
> Reported-by: kernel test robot <lkp@xxxxxxxxx>
> Fixes: 93c7f4d357de ("crypto: sun8i-ce - enable working on big...")
> Signed-off-by: Herbert Xu <herbert@xxxxxxxxxxxxxxxxxxx>
> 
> diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
> index 138759dc8190..703a60d4e2f6 100644
> --- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
> +++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
> @@ -120,7 +120,7 @@ int sun8i_ce_run_task(struct sun8i_ce_dev *ce, int flow, const char *name)
>  	/* Be sure all data is written before enabling the task */
>  	wmb();
>  
> -	v = 1 | (ce->chanlist[flow].tl->t_common_ctl & 0x7F) << 8;
> +	v = 1 | (le32_to_cpu(ce->chanlist[flow].tl->t_common_ctl) & 0x7F) << 8;
>  	writel(v, ce->base + CE_TLR);
>  	mutex_unlock(&ce->mlock);
>  
> -- 
> Email: Herbert Xu <herbert@xxxxxxxxxxxxxxxxxxx>
> Home Page: http://gondor.apana.org.au/~herbert/
> PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

This is fixed in my v4 serie and the current driver is unaffected, only hashes/rng could hit a problem and v4 bring them along with the fix.