[PATCH 3/3] arm64: dts: sc7180: Add assigned-performance-states for i2c
From: Rajendra Nayak
Date: Tue Aug 04 2020 - 07:47:32 EST
qup-i2c devices on sc7180 are clocked with a fixed clock (19.2 Mhz)
Though qup-i2c does not support DVFS, it still needs to vote for a
performance state on 'cx' to satisfy the 19.2 Mhz clock frequency
requirement.
Use 'assigned-performance-states' to pass this information from
device tree, and also add the power-domains property to specify
the cx power-domain.
Signed-off-by: Rajendra Nayak <rnayak@xxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index d46b383..f96ca21 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -767,6 +767,8 @@
<&aggre1_noc MASTER_QUP_0 &mc_virt SLAVE_EBI1>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
+ power-domains = <&rpmhpd SC7180_CX>;
+ assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
status = "disabled";
};
@@ -819,6 +821,8 @@
<&aggre1_noc MASTER_QUP_0 &mc_virt SLAVE_EBI1>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
+ power-domains = <&rpmhpd SC7180_CX>;
+ assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
status = "disabled";
};
@@ -871,6 +875,8 @@
<&aggre1_noc MASTER_QUP_0 &mc_virt SLAVE_EBI1>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
+ power-domains = <&rpmhpd SC7180_CX>;
+ assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
status = "disabled";
};
@@ -905,6 +911,8 @@
<&aggre1_noc MASTER_QUP_0 &mc_virt SLAVE_EBI1>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
+ power-domains = <&rpmhpd SC7180_CX>;
+ assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
status = "disabled";
};
@@ -957,6 +965,8 @@
<&aggre1_noc MASTER_QUP_0 &mc_virt SLAVE_EBI1>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
+ power-domains = <&rpmhpd SC7180_CX>;
+ assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
status = "disabled";
};
@@ -991,6 +1001,8 @@
<&aggre1_noc MASTER_QUP_0 &mc_virt SLAVE_EBI1>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
+ power-domains = <&rpmhpd SC7180_CX>;
+ assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
status = "disabled";
};
@@ -1058,6 +1070,8 @@
<&aggre2_noc MASTER_QUP_1 &mc_virt SLAVE_EBI1>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
+ power-domains = <&rpmhpd SC7180_CX>;
+ assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
status = "disabled";
};
@@ -1110,6 +1124,8 @@
<&aggre2_noc MASTER_QUP_1 &mc_virt SLAVE_EBI1>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
+ power-domains = <&rpmhpd SC7180_CX>;
+ assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
status = "disabled";
};
@@ -1144,6 +1160,8 @@
<&aggre2_noc MASTER_QUP_1 &mc_virt SLAVE_EBI1>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
+ power-domains = <&rpmhpd SC7180_CX>;
+ assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
status = "disabled";
};
@@ -1196,6 +1214,8 @@
<&aggre2_noc MASTER_QUP_1 &mc_virt SLAVE_EBI1>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
+ power-domains = <&rpmhpd SC7180_CX>;
+ assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
status = "disabled";
};
@@ -1230,6 +1250,8 @@
<&aggre2_noc MASTER_QUP_1 &mc_virt SLAVE_EBI1>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
+ power-domains = <&rpmhpd SC7180_CX>;
+ assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
status = "disabled";
};
@@ -1282,6 +1304,8 @@
<&aggre2_noc MASTER_QUP_1 &mc_virt SLAVE_EBI1>;
interconnect-names = "qup-core", "qup-config",
"qup-memory";
+ power-domains = <&rpmhpd SC7180_CX>;
+ assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
status = "disabled";
};
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation