[PATCH 14/16] dt: add an spec for the Kirin36x0 SMMU
From: Mauro Carvalho Chehab
Date: Mon Aug 17 2020 - 03:51:03 EST
Describe the properties expected by the IOMMU driver used on
Hikey960 and Hikey970 boards.
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@xxxxxxxxxx>
---
.../iommu/hisilicon,kirin36x0-smmu.yaml | 55 +++++++++++++++++++
1 file changed, 55 insertions(+)
create mode 100644 Documentation/devicetree/bindings/iommu/hisilicon,kirin36x0-smmu.yaml
diff --git a/Documentation/devicetree/bindings/iommu/hisilicon,kirin36x0-smmu.yaml b/Documentation/devicetree/bindings/iommu/hisilicon,kirin36x0-smmu.yaml
new file mode 100644
index 000000000000..ec4c98faf3a5
--- /dev/null
+++ b/Documentation/devicetree/bindings/iommu/hisilicon,kirin36x0-smmu.yaml
@@ -0,0 +1,55 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/iommu/hisilicon,kirin36x0-smmu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Hisilicon support for HI3660/HI3670 SMMU
+
+maintainers:
+ - Mauro Carvalho Chehab <mchehab+huawei@xxxxxxxxxx>
+
+description: |+
+ Huawei's Hisilicon Kirin 3660/3670 contains a System MMU that enables
+ scattered physical memory chunks visible as a contiguous region to
+ DMA-capable peripheral devices like GPU and ISP.
+
+ The IOMMU domains are described via iommu_info settings.
+
+properties:
+ compatible:
+ const: hisilicon,hisi-smmu-lpae
+
+ iommu_info:
+ type: object
+
+ properties:
+ start-addr:
+ maxItems: 1
+ description: Memory start address (32 bits)
+
+ size:
+ maxItems: 1
+ description: size of the I/O MMU block (32 bits)
+
+ iova-align:
+ minItems: 2
+ maxItems: 2
+ description: DMA address alignment of the mapped memory (64 bits)
+
+required:
+ - compatible
+
+additionalProperties: false
+
+examples:
+ - |
+ smmu_lpae {
+ compatible = "hisilicon,smmu-lpae";
+
+ iommu_info {
+ start-addr = <0x40000>;
+ size = <0xbffc0000>;
+ iova-align = <0x0 0x8000>;
+ };
+ };
--
2.26.2