Re: [PATCH RESEND 1/2] MIPS: cacheinfo: Add missing VCache
From: Thomas Bogendoerfer
Date: Fri Aug 21 2020 - 13:03:03 EST
On Thu, Aug 20, 2020 at 08:42:49AM +0800, Jiaxun Yang wrote:
> Victim Cache is defined by Loongson as per-core unified
> private Cache.
> Add this into cacheinfo and make cache levels selfincrement
> instead of hardcode levels.
>
> Signed-off-by: Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx>
> ---
> arch/mips/kernel/cacheinfo.c | 34 ++++++++++++++++++++++++++--------
> 1 file changed, 26 insertions(+), 8 deletions(-)
>
> diff --git a/arch/mips/kernel/cacheinfo.c b/arch/mips/kernel/cacheinfo.c
> index 47312c529410..83548331ee94 100644
> --- a/arch/mips/kernel/cacheinfo.c
> +++ b/arch/mips/kernel/cacheinfo.c
> @@ -35,6 +35,11 @@ static int __init_cache_level(unsigned int cpu)
>
> leaves += (c->icache.waysize) ? 2 : 1;
>
> + if (c->vcache.waysize) {
> + levels++;
> + leaves++;
> + }
> +
> if (c->scache.waysize) {
> levels++;
> leaves++;
> @@ -74,25 +79,38 @@ static int __populate_cache_leaves(unsigned int cpu)
> struct cpuinfo_mips *c = ¤t_cpu_data;
> struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
> struct cacheinfo *this_leaf = this_cpu_ci->info_list;
> + int level = 1;
>
> if (c->icache.waysize) {
> - /* L1 caches are per core */
> + /* D/I caches are per core */
> fill_cpumask_siblings(cpu, &this_leaf->shared_cpu_map);
> - populate_cache(dcache, this_leaf, 1, CACHE_TYPE_DATA);
> + populate_cache(dcache, this_leaf, level, CACHE_TYPE_DATA);
> fill_cpumask_siblings(cpu, &this_leaf->shared_cpu_map);
> - populate_cache(icache, this_leaf, 1, CACHE_TYPE_INST);
> + populate_cache(icache, this_leaf, level, CACHE_TYPE_INST);
> + level++;
> } else {
> - populate_cache(dcache, this_leaf, 1, CACHE_TYPE_UNIFIED);
> + populate_cache(dcache, this_leaf, level, CACHE_TYPE_UNIFIED);
> + level++;
> + }
> +
> + if (c->vcache.waysize) {
why can't we insert vcache as level 4 and leave the rest of the file
alone ?
Thomas.
--
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