[PATCH v2 1/1] edac: fsl_ddr_edac: fix expected data message
From: Gregor Herburger
Date: Thu Aug 27 2020 - 03:59:15 EST
When a correctable single bit error occurs, the driver calculates the
bad_data_bit respectively the bad_ecc_bit. If there is no error in the
corresponding data, the value becomes -1. With this the expected data
message is calculated.
In the case of an error in the lower 32 bits or no error (-1) the right
side operand of the bit-shift becomes negative which is undefined
behavior.
This can result in wrong and misleading messages like this:
[ 311.103794] EDAC FSL_DDR MC0: Faulty Data bit: 36
[ 311.108490] EDAC FSL_DDR MC0: Expected Data / ECC: 0xffffffef_ffffffff / 0x80000059
[ 311.116135] EDAC FSL_DDR MC0: Captured Data / ECC: 0xffffffff_ffffffef / 0x59
Fix this by only calculating the expected data where the error occurred.
With the fix the dmesg output looks like this:
[ 311.103794] EDAC FSL_DDR MC0: Faulty Data bit: 36
[ 311.108490] EDAC FSL_DDR MC0: Expected Data / ECC: 0xffffffef_ffffffef / 0x59
[ 311.116135] EDAC FSL_DDR MC0: Captured Data / ECC: 0xffffffff_ffffffef / 0x59
Signed-off-by: Gregor Herburger <gregor.herburger@xxxxxxxxxxxxxxx>
---
drivers/edac/fsl_ddr_edac.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/edac/fsl_ddr_edac.c b/drivers/edac/fsl_ddr_edac.c
index 6d8ea226010d..4b6989cf1947 100644
--- a/drivers/edac/fsl_ddr_edac.c
+++ b/drivers/edac/fsl_ddr_edac.c
@@ -343,9 +343,9 @@ static void fsl_mc_check(struct mem_ctl_info *mci)
fsl_mc_printk(mci, KERN_ERR,
"Expected Data / ECC:\t%#8.8x_%08x / %#2.2x\n",
- cap_high ^ (1 << (bad_data_bit - 32)),
- cap_low ^ (1 << bad_data_bit),
- syndrome ^ (1 << bad_ecc_bit));
+ (bad_data_bit > 31) ? cap_high ^ (1 << (bad_data_bit - 32)) : cap_high,
+ (bad_data_bit <= 31) ? cap_low ^ (1 << (bad_data_bit)) : cap_low,
+ (bad_ecc_bit != -1) ? syndrome ^ (1 << (bad_ecc_bit)) : syndrome);
}
fsl_mc_printk(mci, KERN_ERR,
--
2.17.1