Re: [PATCH v2] x86/mce: Add Skylake quirk for patrol scrub reported errors
From: Luck, Tony
Date: Fri Aug 28 2020 - 16:21:55 EST
From: Youquan Song <youquan.song@xxxxxxxxx>
Skylake has a mode where the system administrator can use a BIOS setup
option to request that the memory controller report uncorrected errors
found by the patrol scrubber as corrected. This results in them being
signalled using CMCI, which is less disruptive than a machine check.
Add a quirk to detect that a "corrected" error is actually a downgraded
uncorrected error with model specific checks for the "MSCOD" signature in
MCi_STATUS and that the error was reported from a memory controller bank.
Adjust the severity to MCE_AO_SEVERITY so that Linux will try to take
the affected page offline.
[Tony: Wordsmith commit comment]
Signed-off-by: Youquan Song <youquan.song@xxxxxxxxx>
Signed-off-by: Tony Luck <tony.luck@xxxxxxxxx>
---
This updated patch slipped through some cracks. Sorry for the delay.
V2:
Boris: Don't optimize with pointer to quirk function. Just do
the vendor/family/model check in the adjust_mce_log()
function
Tony: Add check for stepping >= 4
---
arch/x86/kernel/cpu/mce/core.c | 30 ++++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c
index e9265e2f28c9..2d5fe23adf29 100644
--- a/arch/x86/kernel/cpu/mce/core.c
+++ b/arch/x86/kernel/cpu/mce/core.c
@@ -673,6 +673,35 @@ static void mce_read_aux(struct mce *m, int i)
}
}
+/*
+ * Skylake family CPUs have a mode where the user can request that
+ * the memory controller report uncorrected errors found by the patrol
+ * scrubber as corrected (MCI_STATUS_UC == 0). This results in them being
+ * signalled using CMCI, which is less disruptive that a machine check.
+ * The following quirk detects such errors and adjusts the severity.
+ */
+
+#define MSCOD_UCE_SCRUB (0x0010 << 16) /* UnCorrected Patrol Scrub Error */
+#define MSCOD_MASK GENMASK_ULL(31, 16)
+
+static void adjust_mce_log(struct mce *m)
+{
+ struct cpuinfo_x86 *c = &boot_cpu_data;
+
+ if (c->x86_vendor == X86_VENDOR_INTEL && c->x86 == 6 &&
+ c->x86_model == INTEL_FAM6_SKYLAKE_X && c->x86_stepping >= 4) {
+ /*
+ * Check the error code to see if this is an uncorrected patrol
+ * scrub error from one of the memory controller banks. If so,
+ * then adjust the severity level to MCE_AO_SEVERITY
+ */
+ if (((m->status & MCACOD_SCRUBMSK) == MCACOD_SCRUB) &&
+ ((m->status & MSCOD_MASK) == MSCOD_UCE_SCRUB) &&
+ m->bank >= 13 && m->bank <= 18)
+ m->severity = MCE_AO_SEVERITY;
+ }
+}
+
DEFINE_PER_CPU(unsigned, mce_poll_count);
/*
@@ -772,6 +801,7 @@ bool machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
if (mca_cfg.dont_log_ce && !mce_usable_address(&m))
goto clear_it;
+ adjust_mce_log(&m);
mce_log(&m);
clear_it:
--
2.21.1