Re: [PATCH] clk: renesas: cpg-mssr: Add clk entry for VSPR

From: Geert Uytterhoeven
Date: Mon Aug 31 2020 - 08:39:20 EST


Hi Prabhakar,

Thanks for your patch!

On Tue, Aug 25, 2020 at 3:48 PM Lad Prabhakar
<prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> wrote:
> Add clock entry 130 for VSPR module, so that this module can be used

VSPR ("VSP for Resizing")

> on R8A7742 (RZ/G1H) SoC.
>
> Note: The entry for VSPR clock was accidentally dropped from RZ/G manual
> when all the information related to RT were removed.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> Reviewed-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> ---
> Similar details can be seen in commit 79ea9934b8df ("ARM: shmobile:
> r8a7790: Rename VSP1_(SY|RT) clocks to VSP1_(S|R)") for R-Car H2

Indeed. And R-Car H2 and other related soCs are still affected, as that
fix never made it to the new clock drivers ;-(

> --- a/drivers/clk/renesas/r8a7742-cpg-mssr.c
> +++ b/drivers/clk/renesas/r8a7742-cpg-mssr.c
> @@ -97,6 +97,7 @@ static const struct mssr_mod_clk r8a7742_mod_clks[] __initconst = {
> DEF_MOD("tmu0", 125, R8A7742_CLK_CP),
> DEF_MOD("vsp1du1", 127, R8A7742_CLK_ZS),
> DEF_MOD("vsp1du0", 128, R8A7742_CLK_ZS),
> + DEF_MOD("vspr", 130, R8A7742_CLK_ZS),
> DEF_MOD("vsp1-sy", 131, R8A7742_CLK_ZS),

While at it, can you please replace "vsp1-sy" by "vsps" (VSPS = "VSP
Standard"), and fix the other drivers, too?

Thanks!

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

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