[PATCH v3 2/6] perf tsc: Add rdtsc() for Arm64
From: Leo Yan
Date: Wed Sep 02 2020 - 09:49:03 EST
The system register CNTVCT_EL0 can be used to retrieve the counter from
user space. Add rdtsc() for Arm64.
Signed-off-by: Leo Yan <leo.yan@xxxxxxxxxx>
---
tools/perf/arch/arm64/util/Build | 1 +
tools/perf/arch/arm64/util/tsc.c | 14 ++++++++++++++
2 files changed, 15 insertions(+)
create mode 100644 tools/perf/arch/arm64/util/tsc.c
diff --git a/tools/perf/arch/arm64/util/Build b/tools/perf/arch/arm64/util/Build
index 5c13438c7bd4..b53294d74b01 100644
--- a/tools/perf/arch/arm64/util/Build
+++ b/tools/perf/arch/arm64/util/Build
@@ -1,6 +1,7 @@
perf-y += header.o
perf-y += machine.o
perf-y += perf_regs.o
+perf-y += tsc.o
perf-$(CONFIG_DWARF) += dwarf-regs.o
perf-$(CONFIG_LOCAL_LIBUNWIND) += unwind-libunwind.o
perf-$(CONFIG_LIBDW_DWARF_UNWIND) += unwind-libdw.o
diff --git a/tools/perf/arch/arm64/util/tsc.c b/tools/perf/arch/arm64/util/tsc.c
new file mode 100644
index 000000000000..53c6adf8ea6e
--- /dev/null
+++ b/tools/perf/arch/arm64/util/tsc.c
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <linux/types.h>
+
+#include "../../../util/tsc.h"
+
+u64 rdtsc(void)
+{
+ u64 val;
+
+ asm volatile("mrs %0, cntvct_el0" : "=r" (val));
+
+ return val;
+}
--
2.17.1