Re: [PATCH v2] clk: renesas: r8a7742-cpg-mssr: Add clk entry for VSPR

[Geert Uytterhoeven]

On Mon, Aug 31, 2020 at 8:03 PM Lad Prabhakar
<prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> wrote:
> Add clock entry 130 for VSPR (VSP for Resizing) module, so that this module
> can be used on R8A7742 (RZ/G1H) SoC.
>
> Alongside rename clock entry "vsp1-sy" to "vsps" (VSP Standard), so that
> VSP1 clock names are in sync.
>
> Note: The entry for VSPR clock was accidentally dropped from RZ/G manual
> when all the information related to RT were removed.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> Reviewed-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> ---
> v1->v2
> * Alongside renamed "vsp1-sy" to "vsps"
> * Updated commit message

Thanks for the update!

Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
i.e. will queue in clk-renesas-for-v5.10.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

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