Re: [PATCH 1/2] arm64: dts: renesas: r8a774e1: Add FDP1 device nodes

[Kieran Bingham]

On 27/08/2020 15:53, Lad Prabhakar wrote:
> From: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@xxxxxxxxxxxxxx>
> 
> Add FDP1 device nodes to R8A774E1 (RZ/G2H) SoC dtsi.
> 
> Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@xxxxxxxxxxxxxx>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>

Reviewed-by: Kieran Bingham <kieran.bingham@xxxxxxxxxxxxxxxx>

I'd really love to know if people are using this FDP1 with the driver I
added ;-)



> ---
>  arch/arm64/boot/dts/renesas/r8a774e1.dtsi | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
> index f5909ced7679..34fdb9a0c325 100644
> --- a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
> @@ -2504,6 +2504,26 @@
>  			renesas,fcp = <&fcpvi1>;
>  		};
>  
> +		fdp1@fe940000 {
> +			compatible = "renesas,fdp1";
> +			reg = <0 0xfe940000 0 0x2400>;
> +			interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&cpg CPG_MOD 119>;
> +			power-domains = <&sysc R8A774E1_PD_A3VP>;
> +			resets = <&cpg 119>;
> +			renesas,fcp = <&fcpf0>;
> +		};
> +
> +		fdp1@fe944000 {
> +			compatible = "renesas,fdp1";
> +			reg = <0 0xfe944000 0 0x2400>;
> +			interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&cpg CPG_MOD 118>;
> +			power-domains = <&sysc R8A774E1_PD_A3VP>;
> +			resets = <&cpg 118>;
> +			renesas,fcp = <&fcpf1>;
> +		};
> +
>  		fcpf0: fcp@fe950000 {
>  			compatible = "renesas,fcpf";
>  			reg = <0 0xfe950000 0 0x200>;
>