[PATCH 2/3] arm64: dts: meson-axg: add MIPI DSI Nodes
From: Neil Armstrong
Date: Mon Sep 07 2020 - 04:33:21 EST
This adds the nodes for :
- MIPI DSI+PCIe analog phy
- MIPI D-PHY
- Synopsys MIPI-DSI Transceiver
Signed-off-by: Neil Armstrong <narmstrong@xxxxxxxxxxxx>
---
arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 60 ++++++++++++++++++++++
1 file changed, 60 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index 4a93e3fecd90..f1501b19f617 100644
--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
@@ -13,6 +13,7 @@
#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
#include <dt-bindings/reset/amlogic,meson-axg-reset.h>
#include <dt-bindings/power/meson-axg-power.h>
+#include <dt-bindings/phy/phy.h>
/ {
compatible = "amlogic,meson-axg";
@@ -1111,6 +1112,8 @@
sysctrl: system-controller@0 {
compatible = "amlogic,meson-axg-hhi-sysctrl",
"simple-mfd", "syscon";
+ #address-cells = <2>;
+ #size-cells = <2>;
reg = <0 0 0 0x400>;
clkc: clock-controller {
@@ -1159,6 +1162,12 @@
<250000000>,
<0>; /* Do Nothing */
};
+
+ mipi_pcie_analog_dphy: phy {
+ compatible = "amlogic,axg-mipi-pcie-analog-phy";
+ #phy-cells = <0>;
+ status = "disabled";
+ };
};
};
@@ -1171,6 +1180,19 @@
#mbox-cells = <1>;
};
+ mipi_dphy: phy@ff640000 {
+ compatible = "amlogic,axg-mipi-dphy";
+ reg = <0x0 0xff640000 0x0 0x100>;
+ clocks = <&clkc CLKID_MIPI_DSI_PHY>;
+ clock-names = "pclk";
+ resets = <&reset RESET_MIPI_PHY>;
+ reset-names = "phy";
+ phys = <&mipi_pcie_analog_dphy>;
+ phy-names = "analog";
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
audio: bus@ff642000 {
compatible = "simple-bus";
reg = <0x0 0xff642000 0x0 0x2000>;
@@ -1618,6 +1640,10 @@
/* DPI output port */
dpi_port: port@2 {
reg = <2>;
+
+ dpi_out: endpoint {
+ remote-endpoint = <&mipi_dsi_in>;
+ };
};
};
@@ -1647,6 +1673,40 @@
#reset-cells = <1>;
};
+ mipi_dsi: dsi@7000 {
+ compatible = "amlogic,meson-axg-dw-mipi-dsi";
+ reg = <0x0 0x6000 0x0 0x400>;
+ resets = <&reset RESET_MIPI_HOST>;
+ reset-names = "top";
+ clocks = <&clkc CLKID_MIPI_DSI_HOST>,
+ <&clkc CLKID_GP0_PLL>;
+ clock-names = "pclk", "px_clk";
+ phys = <&mipi_dphy>;
+ phy-names = "dphy";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* VPU VENC Input */
+ mipi_dsi_venc_port: port@0 {
+ reg = <0>;
+
+ mipi_dsi_in: endpoint {
+ remote-endpoint = <&dpi_out>;
+ };
+ };
+
+ /* DSI Output */
+ mipi_dsi_panel_port: port@1 {
+ reg = <1>;
+ };
+ };
+ };
+
gpio_intc: interrupt-controller@f080 {
compatible = "amlogic,meson-axg-gpio-intc",
"amlogic,meson-gpio-intc";
--
2.22.0