[RFC PATCH v7 10/21] riscv: Add task switch support for vector

From: Greentime Hu
Date: Thu Sep 10 2020 - 04:20:28 EST

This patch adds task switch support for vector. It supports partial lazy
save and restore mechanism. It also supports all lengths of vlen.

[guoren@xxxxxxxxxxxxxxxxx: First available porting to support vector
context switching]
[nick.knight@xxxxxxxxxx: Rewrite vector.S to support dynamic vlen, xlen and
code refine]
[vincent.chen@xxxxxxxxx: Fix the might_sleep issue in vstate_save,
Signed-off-by: Nick Knight <nick.knight@xxxxxxxxxx>
Signed-off-by: Greentime Hu <greentime.hu@xxxxxxxxxx>
Signed-off-by: Guo Ren <guoren@xxxxxxxxxxxxxxxxx>
Signed-off-by: Vincent Chen <vincent.chen@xxxxxxxxxx>
arch/riscv/include/asm/switch_to.h | 1 +
1 file changed, 1 insertion(+)

diff --git a/arch/riscv/include/asm/switch_to.h b/arch/riscv/include/asm/switch_to.h
index 2afd0124701a..d33a86a48f0d 100644
--- a/arch/riscv/include/asm/switch_to.h
+++ b/arch/riscv/include/asm/switch_to.h
@@ -87,6 +87,7 @@ static inline void vstate_save(struct task_struct *task,
if ((regs->status & SR_VS) == SR_VS_DIRTY) {
struct __riscv_v_state *vstate = &(task->thread.vstate);
__vstate_save(vstate, vstate->datap);