Re: [PATCH 1/3] ARM: tegra: Add device-tree for Ouya

[Dmitry Osipenko]

16.09.2020 17:57, Peter Geis пишет:
> On Wed, Sep 16, 2020 at 10:17 AM Dmitry Osipenko <digetx@xxxxxxxxx> wrote:
>>
>> 16.09.2020 15:22, Peter Geis пишет:
>>> The Ouya was the sole device produced by Ouya Inc in 2013.
>>> It was a game console originally running Android 5 on top of Linux 3.1.10.
>>>
>>> This patch adds the device tree supporting the Ouya.
>>> It has been tested on the original variant with Samsung ram.
>>>
>>> Signed-off-by: Peter Geis <pgwipeout@xxxxxxxxx>
>>> ---
>>>  arch/arm/boot/dts/Makefile         |    3 +-
>>>  arch/arm/boot/dts/tegra30-ouya.dts | 4498 ++++++++++++++++++++++++++++
>>>  2 files changed, 4500 insertions(+), 1 deletion(-)
>>>  create mode 100644 arch/arm/boot/dts/tegra30-ouya.dts
>>
>> Hello, Peter! Very nice work!
> 
> Thanks!
> 
>>
>> Could you please clarify how many variants of the board exist?
> 
> It is unknown how many exist in reality.
> At least three RAM variants are supported in the downstream kernel,
> Samsung, Hynix M, and Hynix A.
> Two variants in storage capacity, the original had 8GB eMMC while the
> new variant had 16GB eMMC.
> 
>>
>> What are the differences between the variants?
> 
> Aside from the RAM and storage changes there should be no functional
> differences.
> It is unknown at which point the RAM changes were cut in with the eMMC change.
> 
>>
>> Is this device-tree suitable for all variants?
> 
> This device tree should support all variants, but I haven't been able
> to locate anyone with the newer variants who can test it yet.
> 
>>
>> How user could determine the board's variant?
> 
> On upstream:
> The tegra emc driver will output the RAM code detected in the kernel log:
> tegra30-emc 7000f400.memory-controller: got 6 timings for RAM code 0
> (min 25MHz max 800MHz)
> The mmc-core will output the storage capacity in the kernel log:
> mmcblk1: mmc1:0001 MMC08G 7.19 GiB
> 
> On downstream:
> The ram variant is output in the kernel log:
> DDR Strap Pin AD4: 0
> DDR Strap Pin AD5: 0
> Init DFS table for Samsung DDR
> The mmc-core outputs the storage capacity in the kernel log:
> mmcblk0: mmc0:0001 MMC08G 7.18 GiB
> 

I was thinking that maybe it could be necessary to separate the DT per
board variant, like we did it for Nexus 7, but it shouldn't be needed
given yours answer.

So far looks good to me!